* [PATCH] cxl: update eiw_to_ways() comment referring to cxl spec
@ 2022-10-24 21:55 Dave Jiang
2022-10-25 11:06 ` Jonathan Cameron
0 siblings, 1 reply; 2+ messages in thread
From: Dave Jiang @ 2022-10-24 21:55 UTC (permalink / raw)
To: linux-cxl
Cc: dan.j.williams, ira.weiny, vishal.l.verma, alison.schofield,
Jonathan.Cameron
Change comment pointing to CLX ECN to the releveant released rev3 spec.
Suggested-by: Alison Schofield <alison.schofield@intel.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---
drivers/cxl/cxl.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index e2a1a7523a2b..512ba28a6349 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -77,7 +77,7 @@ static inline int eig_to_granularity(u16 eig, unsigned int *granularity)
return 0;
}
-/* Encode defined in CXL ECN "3, 6, 12 and 16-way memory Interleaving" */
+/* Encode defined in CXL rev3.0 8.2.4.19.7 CXL HDM Decoder n Control Register */
static inline int eiw_to_ways(u8 eiw, unsigned int *ways)
{
switch (eiw) {
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH] cxl: update eiw_to_ways() comment referring to cxl spec
2022-10-24 21:55 [PATCH] cxl: update eiw_to_ways() comment referring to cxl spec Dave Jiang
@ 2022-10-25 11:06 ` Jonathan Cameron
0 siblings, 0 replies; 2+ messages in thread
From: Jonathan Cameron @ 2022-10-25 11:06 UTC (permalink / raw)
To: Dave Jiang
Cc: linux-cxl, dan.j.williams, ira.weiny, vishal.l.verma,
alison.schofield
On Mon, 24 Oct 2022 14:55:07 -0700
Dave Jiang <dave.jiang@intel.com> wrote:
> Change comment pointing to CLX ECN to the releveant released rev3 spec.
>
> Suggested-by: Alison Schofield <alison.schofield@intel.com>
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Confirmed reference is correct.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> ---
> drivers/cxl/cxl.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index e2a1a7523a2b..512ba28a6349 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -77,7 +77,7 @@ static inline int eig_to_granularity(u16 eig, unsigned int *granularity)
> return 0;
> }
>
> -/* Encode defined in CXL ECN "3, 6, 12 and 16-way memory Interleaving" */
> +/* Encode defined in CXL rev3.0 8.2.4.19.7 CXL HDM Decoder n Control Register */
> static inline int eiw_to_ways(u8 eiw, unsigned int *ways)
> {
> switch (eiw) {
>
>
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2022-10-25 11:06 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-10-24 21:55 [PATCH] cxl: update eiw_to_ways() comment referring to cxl spec Dave Jiang
2022-10-25 11:06 ` Jonathan Cameron
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox