From: "Michael S. Tsirkin" <mst@redhat.com>
To: Gregory Price <gourry.memverge@gmail.com>
Cc: qemu-devel@nongnu.org, jonathan.cameron@huawei.com,
linux-cxl@vger.kernel.org, marcel.apfelbaum@gmail.com,
imammedo@redhat.com, ani@anisinha.ca, alison.schofield@intel.com,
dave@stgolabs.net, a.manzanares@samsung.com, bwidawsk@kernel.org,
gregory.price@memverge.com, hchkuo@avery-design.com.tw,
cbrowy@avery-design.com, ira.weiny@intel.com
Subject: Re: [PATCH 1/4] hw/i386/pc.c: CXL Fixed Memory Window should not reserve e820 in bios
Date: Wed, 26 Oct 2022 16:33:56 -0400 [thread overview]
Message-ID: <20221026163336-mutt-send-email-mst@kernel.org> (raw)
In-Reply-To: <20221026004737.3646-2-gregory.price@memverge.com>
On Tue, Oct 25, 2022 at 08:47:34PM -0400, Gregory Price wrote:
> Early-boot e820 records will be inserted by the bios/efi/early boot
> software and be reported to the kernel via insert_resource. Later, when
> CXL drivers iterate through the regions again, they will insert another
> resource and make the RESERVED memory area a child.
>
> This RESERVED memory area causes the memory region to become unusable,
> and as a result attempting to create memory regions with
>
> `cxl create-region ...`
>
> Will fail due to the RESERVED area intersecting with the CXL window.
>
> During boot the following traceback is observed:
>
> 0xffffffff81101650 in insert_resource_expand_to_fit ()
> 0xffffffff83d964c5 in e820__reserve_resources_late ()
> 0xffffffff83e03210 in pcibios_resource_survey ()
> 0xffffffff83e04f4a in pcibios_init ()
>
> Which produces a call to reserve the CFMWS area:
>
> (gdb) p *new
> $54 = {start = 0x290000000, end = 0x2cfffffff, name = "Reserved",
> flags = 0x200, desc = 0x7, parent = 0x0, sibling = 0x0,
> child = 0x0}
>
> Later the Kernel parses ACPI tables and reserves the exact same area as
> the CXL Fixed Memory Window:
>
> 0xffffffff811016a4 in insert_resource_conflict ()
> insert_resource ()
> 0xffffffff81a81389 in cxl_parse_cfmws ()
> 0xffffffff818c4a81 in call_handler ()
> acpi_parse_entries_array ()
>
> (gdb) p/x *new
> $59 = {start = 0x290000000, end = 0x2cfffffff, name = "CXL Window 0",
> flags = 0x200, desc = 0x0, parent = 0x0, sibling = 0x0,
> child = 0x0}
>
> This produces the following output in /proc/iomem:
>
> 590000000-68fffffff : CXL Window 0
> 590000000-68fffffff : Reserved
>
> This reserved area causes `get_free_mem_region()` to fail due to a check
> against `__region_intersects()`. Due to this reserved area, the
> intersect check will only ever return REGION_INTERSECTS, which causes
> `cxl create-region` to always fail.
>
> Signed-off-by: Gregory Price <gregory.price@memverge.com>
Do we want this as a bugfix, separate from the rest of the
patchset?
> ---
> hw/i386/pc.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index 768982ae9a..203c90fedb 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -1062,7 +1062,6 @@ void pc_memory_init(PCMachineState *pcms,
> hwaddr cxl_size = MiB;
>
> cxl_base = pc_get_cxl_range_start(pcms);
> - e820_add_entry(cxl_base, cxl_size, E820_RESERVED);
> memory_region_init(mr, OBJECT(machine), "cxl_host_reg", cxl_size);
> memory_region_add_subregion(system_memory, cxl_base, mr);
> cxl_resv_end = cxl_base + cxl_size;
> @@ -1078,7 +1077,6 @@ void pc_memory_init(PCMachineState *pcms,
> memory_region_init_io(&fw->mr, OBJECT(machine), &cfmws_ops, fw,
> "cxl-fixed-memory-region", fw->size);
> memory_region_add_subregion(system_memory, fw->base, &fw->mr);
> - e820_add_entry(fw->base, fw->size, E820_RESERVED);
> cxl_fmw_base += fw->size;
> cxl_resv_end = cxl_fmw_base;
> }
> --
> 2.37.3
next prev parent reply other threads:[~2022-10-26 20:34 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20221026004835uscas1p1d37255ba8daaba8fc7e16e5129cb94b5@uscas1p1.samsung.com>
2022-10-26 0:47 ` [PATCH 0/4 v3] Multi-Region and Volatile Memory support for CXL Type-3 Devices Gregory Price
2022-10-26 0:47 ` [PATCH 1/4] hw/i386/pc.c: CXL Fixed Memory Window should not reserve e820 in bios Gregory Price
2022-10-26 20:33 ` Michael S. Tsirkin [this message]
2022-10-26 0:47 ` [PATCH 2/4] hw/cxl: Add CXL_CAPACITY_MULTIPLIER definition Gregory Price
2022-11-14 17:55 ` Jonathan Cameron
2022-10-26 0:47 ` [PATCH 3/4] hw/cxl: Multi-Region CXL Type-3 Devices (Volatile and Persistent) Gregory Price
2022-11-14 17:53 ` Jonathan Cameron
2022-11-14 23:00 ` Gregory Price
2022-11-17 13:53 ` Jonathan Cameron
2022-11-23 17:42 ` Gregory Price
2022-10-26 0:47 ` [PATCH 4/4] hw/acpi/cxl.c: Fill in SRAT for vmem/pmem if NUMA node is assigned Gregory Price
2022-10-26 20:13 ` [PATCH 0/4 v3] Multi-Region and Volatile Memory support for CXL Type-3 Devices Adam Manzanares
2022-10-26 20:47 ` Gregory Price
2022-10-27 10:58 ` Jonathan Cameron
2022-10-27 14:29 ` Gregory Price
2022-10-27 18:10 ` Adam Manzanares
2022-10-26 20:15 ` Michael S. Tsirkin
2022-10-26 20:20 ` Michael S. Tsirkin
2022-10-26 20:48 ` Gregory Price
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