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From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Dave Jiang <dave.jiang@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <dan.j.williams@intel.com>,
	<ira.weiny@intel.com>, <vishal.l.verma@intel.com>,
	<alison.schofield@intel.com>
Subject: Re: [PATCH v2 6/8] cxl: create emulated decoders for devices without HDM decoders
Date: Fri, 13 Jan 2023 14:02:29 +0000	[thread overview]
Message-ID: <20230113140229.000025f1@Huawei.com> (raw)
In-Reply-To: <167330063330.975161.12886268473522769039.stgit@djiang5-mobl3.local>

On Mon, 09 Jan 2023 14:43:54 -0700
Dave Jiang <dave.jiang@intel.com> wrote:

> CXL rev3.0 spec 8.1.3
> RCDs may not have HDM register blocks. Create fake decoders based on CXL
> PCIe DVSEC registers. The DVSEC Range Registers provide the memory range
> for these decoder structs. For the RCD, there can be up to 2 decoders
> depending on the DVSEC Capability register HDM_count.
> 
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>

Second half of this patch seems to be an unrelated refactor...
I missed that entirely when reviewing v1. 


> 
> ---
> v2:
> - Refactor to put error case out of line. (Jonathan)
> - kdoc update. (Jonathan)
> - Remove init_emulated_hdm_decoder(), duplicate of
>   cxl_setup_hdm_decoder_from_dvsec().
> ---
>  drivers/cxl/core/hdm.c |   37 ++++++++++++++++++++++++++++---------
>  1 file changed, 28 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
> index 165c0f382ce1..ed5e9ef3aa9b 100644
> --- a/drivers/cxl/core/hdm.c
> +++ b/drivers/cxl/core/hdm.c
> @@ -747,6 +747,13 @@ static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
>  	if (is_endpoint_decoder(&cxld->dev))
>  		cxled = to_cxl_endpoint_decoder(&cxld->dev);
>  
> +	if (!hdm) {
> +		if (!cxled)
> +			return -EINVAL;
> +
> +		return cxl_setup_hdm_decoder_from_dvsec(port, cxld, which, info);
> +	}
> +
>  	ctrl = readl(hdm + CXL_HDM_DECODER0_CTRL_OFFSET(which));
>  	base = ioread64_hi_lo(hdm + CXL_HDM_DECODER0_BASE_LOW_OFFSET(which));
>  	size = ioread64_hi_lo(hdm + CXL_HDM_DECODER0_SIZE_LOW_OFFSET(which));
> @@ -840,19 +847,15 @@ static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
>  	return 0;
>  }

I have no problem with what follows, but I can't see a clear connection to rest of
the patch.

>  
> -/**
> - * devm_cxl_enumerate_decoders - add decoder objects per HDM register set
> - * @cxlhdm: Structure to populate with HDM capabilities
> - */
> -int devm_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,
> -				struct cxl_endpoint_dvsec_info *info)

Note the docs were wrong before this point...  Probably fix them earlier.

> +static void cxl_settle_decoders(struct cxl_hdm *cxlhdm)
>  {
>  	void __iomem *hdm = cxlhdm->regs.hdm_decoder;
> -	struct cxl_port *port = cxlhdm->port;
> -	int i, committed;
> -	u64 dpa_base = 0;
> +	int committed, i;
>  	u32 ctrl;
>  
> +	if (!hdm)
> +		return;
> +
>  	/*
>  	 * Since the register resource was recently claimed via request_region()
>  	 * be careful about trusting the "not-committed" status until the commit
> @@ -869,6 +872,22 @@ int devm_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,
>  	/* ensure that future checks of committed can be trusted */
>  	if (committed != cxlhdm->decoder_count)
>  		msleep(20);
> +}
> +
> +/**
> + * devm_cxl_enumerate_decoders - add decoder objects per HDM register set
> + * @cxlhdm: Structure to populate with HDM capabilities
> + * @info: cached DVSEC range register info
> + */
> +int devm_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,
> +				struct cxl_endpoint_dvsec_info *info)
> +{
> +	void __iomem *hdm = cxlhdm->regs.hdm_decoder;
> +	struct cxl_port *port = cxlhdm->port;
> +	int i;
> +	u64 dpa_base = 0;
> +
> +	cxl_settle_decoders(cxlhdm);
>  
>  	for (i = 0; i < cxlhdm->decoder_count; i++) {
>  		int target_map[CXL_DECODER_MAX_INTERLEAVE] = { 0 };
> 
> 
> 


  reply	other threads:[~2023-01-13 14:05 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-09 21:43 [PATCH v2 0/8] cxl: Introduce HDM decoder emulation from DVSEC range registers Dave Jiang
2023-01-09 21:43 ` [PATCH v2 1/8] cxl: break out range register decoding from cxl_hdm_decode_init() Dave Jiang
2023-01-13 13:36   ` Jonathan Cameron
2023-01-17 20:12     ` Dave Jiang
2023-01-09 21:43 ` [PATCH v2 2/8] cxl: export cxl_dvsec_rr_decode() to cxl_port Dave Jiang
2023-01-13 13:43   ` Jonathan Cameron
2023-01-09 21:43 ` [PATCH v2 3/8] cxl: refactor cxl_hdm_decode_init() Dave Jiang
2023-01-13 13:46   ` Jonathan Cameron
2023-01-09 21:43 ` [PATCH v2 4/8] cxl: emulate HDM decoder from DVSEC range registers Dave Jiang
2023-01-13 13:51   ` Jonathan Cameron
2023-01-09 21:43 ` [PATCH v2 5/8] cxl: create emulated cxl_hdm for devices that do not have HDM decoders Dave Jiang
2023-01-13 13:54   ` Jonathan Cameron
2023-01-13 14:01   ` Jonathan Cameron
2023-01-09 21:43 ` [PATCH v2 6/8] cxl: create emulated decoders for devices without " Dave Jiang
2023-01-13 14:02   ` Jonathan Cameron [this message]
2023-01-09 21:44 ` [PATCH v2 7/8] cxl: Add emulation when HDM decoders are not committed Dave Jiang
2023-01-13 14:07   ` Jonathan Cameron
2023-01-17 23:19     ` Dave Jiang
2023-01-18 10:12       ` Jonathan Cameron
2023-01-18 15:22         ` Dave Jiang
2023-01-09 21:44 ` [PATCH v2 8/8] cxl: remove locked check for dvsec_range_allowed() Dave Jiang
2023-01-13 14:08   ` Jonathan Cameron

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