Re: [PATCH 2/2] cxl/hdm: Skip emulation when driver manages mem_enable

[Jonathan Cameron <Jonathan.Cameron@huawei.com>]

On Tue, 21 Feb 2023 17:51:24 -0800
Dan Williams <dan.j.williams@intel.com> wrote:

> If the driver is allowed to enable memory operation itself then it can
> also turn on HDM decoder support at will.
> 
> With this the second call to cxl_setup_hdm_decoder_from_dvsec(), when
> an HDM decoder is not committed, is not needed.
> 
> Fixes: b777e9bec960 ("cxl/hdm: Emulate HDM decoder from DVSEC range registers")
> Link: http://lore.kernel.org/r/20230220113657.000042e1@huawei.com
> Reported-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>

For both
Tested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

I could have sworn that mem_enabled was set when I was debugging this before
(hence the odd dance in my proposal)

Meh, doesn't seem to be now so I clearly did something wrong!

Trivial comment below.

I still need to add more tests cases, but this solves the one that
caused the original report.

> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index d853a0238ad7..dd4b7a729419 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -695,13 +695,15 @@ int cxl_endpoint_autoremove(struct cxl_memdev *cxlmd, struct cxl_port *endpoint)
>  
>  /**
>   * struct cxl_endpoint_dvsec_info - Cached DVSEC info
> - * @mem_enabled: cached value of mem_enabled in the DVSEC, PCIE_DEVICE
> + * @mem_enabled: cached value of mem_enabled in the DVSEC at init time

I guess could rename this to make the meaning more obvious, but would make for
a messier fix.

>   * @ranges: Number of active HDM ranges this device uses.
> + * @port: endpoint port associated with this info instance
>   * @dvsec_range: cached attributes of the ranges in the DVSEC, PCIE_DEVICE
>   */
>  struct cxl_endpoint_dvsec_info {
>  	bool mem_enabled;
>  	int ranges;
> +	struct cxl_port *port;
>  	struct range dvsec_range[2];
>  };
>