Re: [PATCH 0/2] cxl: DVSEC Range emulation fixups

[Gregory Price <gregory.price@memverge.com>]

On Wed, Mar 01, 2023 at 10:46:29AM -0800, Dan Williams wrote:
> Hi Gregory,
> 
> Gregory Price wrote:
> > On Tue, Feb 21, 2023 at 05:51:13PM -0800, Dan Williams wrote:
> > > Jonathan points out that the kernel is too agressive in assuming that
> > > DVSEC range registers are in use, reliably skip emulation if
> > > 'mem_enabled' is not set. The helper devm_cxl_setup_emulated_hdm() is
> > > needlessly redoing an allocation, clean that up.
> > > 
> > > ---
> > > 
> > > Dan Williams (2):
> > >       cxl/hdm: Fix double allocation of @cxlhdm
> > >       cxl/hdm: Skip emulation when driver manages mem_enable
> > > 
> > > 
> > >  drivers/cxl/core/hdm.c |   65 ++++++++++++++++++------------------------------
> > >  drivers/cxl/cxl.h      |    4 ++-
> > >  drivers/cxl/port.c     |    2 +
> > >  3 files changed, 28 insertions(+), 43 deletions(-)
> > > 
> > > base-commit: 23c198e3dfaabbc891681aecb0855b9e0ac791e1
> > 
> > 
> > not *quite* sure what to make of this yet, but i get stack trace on boot
> > on real hardware with this patch.  I'm debugging other issues with this
> > hardware, so i'm not sure if it's related or not, but prior to this patch
> > I did not have a stack trace.
> > 
> > 
> > I think there's two issues here:
> > 
> > 1) The system I'm on fails to register a CFMW/root port decoder.  I'm
> >    not entirely sure why, other than during cxl_decoder_add(), the
> >    target map contains "[0,]" as the target id's, and the only
> >    registered ports/decoders are the endpoints.
> > 
> >    I don't know whether this is because the hardware just doesn't have a
> >    root decoder, or what.  But it makes the volatile region patches
> >    non-functional, and i have to revert back to static configuration to
> >    use the real cxl device (i.e. don't mark it EFI_MEMORY_SP).
> 
> It looks like the BIOS is trying to report something in the CEDT.CFMWS
> but it looks
> 
> > 2) Per the second bit - there's no component registers being registered
> >    for this cxl device (plus some spurious DOE error).
> 
> If the CEDT is broken then for RCH topologies the device component
> registers will also be missing.
> 

Just following up, you were correct that the CEDT.CFMWS was broken.

There are other issues that appear, but I will wait for updated BIOS and
then push a bug report once i validate it in a more sane environment.