From: Dan Williams <dan.j.williams@intel.com>
To: Gregory Price <gregory.price@memverge.com>,
Dan Williams <dan.j.williams@intel.com>
Cc: <linux-cxl@vger.kernel.org>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
<dave.jiang@intel.com>
Subject: Re: [PATCH 0/2] cxl: DVSEC Range emulation fixups
Date: Thu, 23 Mar 2023 10:56:06 -0700 [thread overview]
Message-ID: <641c92b61e09d_1d657a294b4@dwillia2-xfh.jf.intel.com.notmuch> (raw)
In-Reply-To: <ZBnmqGxU0kqubfPM@memverge.com>
Gregory Price wrote:
[..]
> > If the CEDT is broken then for RCH topologies the device component
> > registers will also be missing.
> >
>
> Just following up, you were correct that the CEDT.CFMWS was broken.
>
> There are other issues that appear, but I will wait for updated BIOS and
> then push a bug report once i validate it in a more sane environment.
Ah, thanks for that follow up. I had set these aside, but will go ahead
and queue them up for 6.3-rc.
prev parent reply other threads:[~2023-03-23 17:56 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-22 1:51 [PATCH 0/2] cxl: DVSEC Range emulation fixups Dan Williams
2023-02-22 1:51 ` [PATCH 1/2] cxl/hdm: Fix double allocation of @cxlhdm Dan Williams
2023-02-22 12:53 ` Jonathan Cameron
2023-02-22 16:57 ` Dave Jiang
2023-02-22 1:51 ` [PATCH 2/2] cxl/hdm: Skip emulation when driver manages mem_enable Dan Williams
2023-02-22 13:22 ` Jonathan Cameron
2023-02-23 5:05 ` Dan Williams
2023-02-22 16:59 ` Dave Jiang
2023-03-31 16:33 ` Fan Ni
2023-02-24 1:14 ` [PATCH 0/2] cxl: DVSEC Range emulation fixups Gregory Price
2023-03-01 18:46 ` Dan Williams
2023-02-26 7:28 ` Gregory Price
2023-03-03 16:43 ` Gregory Price
2023-03-21 17:17 ` Gregory Price
2023-03-23 17:56 ` Dan Williams [this message]
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