From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Ravi Kanth <mvrravikanth@gmail.com>
Cc: <linux-cxl@vger.kernel.org>, Sajjan Rao <sajjanr@gmail.com>
Subject: Re: Support for CXL v3.0 spec with QEMU
Date: Wed, 23 Aug 2023 18:03:23 +0100 [thread overview]
Message-ID: <20230823180323.000052d5@Huawei.com> (raw)
In-Reply-To: <CAEvOrRzE76U2g_8=V3F-4fqwosRz3n9kO+40E_iG74EcbQBxtw@mail.gmail.com>
On Wed, 16 Aug 2023 17:11:17 +0530
Ravi Kanth <mvrravikanth@gmail.com> wrote:
> Thanks, Jonathan. We were able to now see the CCI endpoint in the lspci output.
>
> However, we are not able to see the /dev/cxl/switch0 node. Should we
> be loading the cxl driver with the changes suggested by you in the
> link below? If yes, We are not able to download the source code as we
> do not see the git repository for the same. Is this part of the
> mainline?
Not yet part of mainline so you will have to apply the patches and build
a custom kernel.
Jonathan
>
> https://lore.kernel.org/linux-cxl/20230804115414.14391-1-Jonathan.Cameron@huawei.com/T/#t
>
> Ravi
>
> On Fri, Aug 11, 2023 at 7:22 PM Jonathan Cameron
> <Jonathan.Cameron@huawei.com> wrote:
> >
> > On Fri, 11 Aug 2023 17:34:33 +0530
> > Ravi Kanth <mvrravikanth@gmail.com> wrote:
> >
> > > Hi Jonathan,
> > > We build qemu with your repository code but we do not see any changes
> > > in the output of lspci. Do we have any prerequisites / command
> > > parameters w.r.t on how we boot the qemu for your changes to take
> > > effect? Please let us know.
> >
> > As the switch cci is a separate PCI function it needs to be explicitly
> > added. See the cover letter of kernel switch-cci RFC:
> >
> > https://lore.kernel.org/linux-cxl/20230804115414.14391-1-Jonathan.Cameron@huawei.com
> >
> > -device cxl-upstream,bus=cxl_rp_port0,id=us0,addr=0.0,multifunction=on, \
> > -device cxl-switch-mailbox-cci,bus=cxl_rp_port0,addr=0.1,target=us0 \
> > -device cxl-downstream,port=0,bus=us0,id=swport0,chassis=0,slot=4 \
> > -device cxl-downstream,port=1,bus=us0,id=swport1,chassis=0,slot=5 \
> >
> > Is the switch part of it.
> >
> > We don't yet have the additions for MHDs though some discussion on how to
> > do it has happened. Those will support some FMAPI command via tunnelling throuhg
> > the main mailbox.
> >
> > I'm on vacation from tonight until the 22nd, so good luck. Feel free
> > to post questions in meantime but my reply will take a while!
> >
> > Jonathan
> >
> > >
> > > Thanks for your help.
> > >
> > > Thanks
> > > Ravi
> > >
> > > On Thu, Aug 10, 2023 at 10:10 PM Ravi Kanth <mvrravikanth@gmail.com> wrote:
> > > >
> > > > Thanks Jonathan for pointing this out. I will definitely take a look
> > > > at this. Current support for the simulation of CCI mailbox is only via
> > > > MCTP messages or even via CXL driver IOCTLs?
> > > >
> > > > Ravi
> > > >
> > > > On Thu, Aug 10, 2023 at 10:03 PM Jonathan Cameron
> > > > <Jonathan.Cameron@huawei.com> wrote:
> > > > >
> > > > > On Thu, 10 Aug 2023 21:42:12 +0530
> > > > > Ravi Kanth <mvrravikanth@gmail.com> wrote:
> > > > >
> > > > > > Hello,
> > > > >
> > > > > Hi Ravi,
> > > > >
> > > > > >
> > > > > > I am writing this mail to know if the latest QEMU has support for CXL
> > > > > > spec v3.0? I understand from the older tutorials that QEMU has support
> > > > > > for CXL v2.0. Is there any update to QEMU to support the CXL v3.0? I
> > > > > > would like to specifically test the CCI mailbox functionality which
> > > > > > has been added to CXL v3.0 spec.
> > > > >
> > > > > The nature of the CXL specification and the QEMU support is that for
> > > > > devices there isn't a clear divide between different generations of
> > > > > the specification. By that I mean, that a device based on the CXL 2.0
> > > > > specification is compatible with the CXL 3.0 specification. As such,
> > > > > the QEMU emulation has focused on features of interest - it is a far
> > > > > from complete implementation of all the options in the CXL 2.0
> > > > > specification but conversely there are some parts of CXL 3.0 are supported.
> > > > >
> > > > > Note that the particular CCI functionality is not yet ready for CXL upstream,
> > > > > but we do have some support in the staging tree I maintain.
> > > > >
> > > > > https://gitlab.com/jic23/qemu/-/commits/cxl-2023-08-07/
> > > > > specifically
> > > > > https://gitlab.com/jic23/qemu/-/commit/2eb7e6402a45b359c304cea894a1d27625a4b80c
> > > > >
> > > > > Note at this stage we only support subset of commands.
> > > > > Contributions of more support welcomed!
> > > > >
> > > > > Intent of the current support and related MCTP CCI access (over I2C) is
> > > > > to enable ecosystem development, particularly of fabric managers.
> > > > > For that a tiny subset of commands was sufficient to be sure the architecture
> > > > > inside QEMU worked and that the proposed kernel code functions correctly.
> > > > >
> > > > > Jonathan
> > > > >
> > > > > >
> > > > > > Thank you in advance for your assistance.
> > > > > >
> > > > > > Ravi
> > > > >
> > > >
> > > >
> > > > --
> > > > Regards
> > > > M.V.R.Ravi Kanth
> > >
> > >
> > >
> >
>
>
next prev parent reply other threads:[~2023-08-23 17:03 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-10 16:12 Support for CXL v3.0 spec with QEMU Ravi Kanth
2023-08-10 16:33 ` Jonathan Cameron
2023-08-10 16:40 ` Ravi Kanth
2023-08-11 12:04 ` Ravi Kanth
2023-08-11 13:52 ` Jonathan Cameron
2023-08-16 11:41 ` Ravi Kanth
2023-08-23 17:03 ` Jonathan Cameron [this message]
2023-09-01 14:03 ` Ravi Kanth
2023-09-01 14:18 ` Gregory Price
2023-09-01 14:37 ` Ravi Kanth
2023-09-01 16:19 ` Ravi Kanth
[not found] ` <SJ0PR17MB5512449C5FFD76AD50B3D3AF83E4A@SJ0PR17MB5512.namprd17.prod.outlook.com>
2023-09-02 14:58 ` Ravi Kanth
2023-10-18 10:30 ` Ravi Kanth
2023-10-19 17:08 ` Ravi Kanth
2023-10-20 20:38 ` Ira Weiny
2023-10-22 6:45 ` Ravi Kanth
2023-10-23 13:50 ` Jonathan Cameron
2023-10-26 1:52 ` Ravi Kanth
2023-10-26 8:59 ` Jonathan Cameron
2023-10-23 13:44 ` Jonathan Cameron
2023-08-11 13:49 ` Jonathan Cameron
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