From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: <alucerop@amd.com>
Cc: <linux-cxl@vger.kernel.org>, <dan.j.williams@intel.com>,
<pieter.jansen-van-vuuren@amd.com>, <richard.hughes@amd.com>,
<dinan.gunawardena@amd.com>
Subject: Re: [RFC PATCH 05/13] cxl: fix check about pmem resource
Date: Fri, 17 May 2024 15:40:31 +0100 [thread overview]
Message-ID: <20240517154031.00007e35@Huawei.com> (raw)
In-Reply-To: <20240516081202.27023-6-alucerop@amd.com>
On Thu, 16 May 2024 09:11:54 +0100
<alucerop@amd.com> wrote:
> From: Alejandro Lucero <alucerop@amd.com>
>
> Current check is using resource_size which counts on a range bigger than
> 0. For a resource with start and end being 0, resource_size returns 1
> and implying a false positive. Use the end not being zero as the new check.
>
> Note: If I´m not missing anything here, this should be extended to the
> whole linux kernel where resource_size is being used in conditionals,
> and where the likely right fix is to modify resource_size itself
> checking for the range not being 0.
The start and end being 0 is a valid resource of length 1 so that
should not need fixing.
These should have been initialized with DEFINE_RES_MEM()
/ DEFINE_RES_NAMED()
That will happily set the .end to -1 resulting in a wrap around
so that you get all bits set.
Sometimes this gives slightly confusing range prints but otherwise
I think it is fine.
>
> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
> ---
> drivers/cxl/core/hdm.c | 4 ++--
> drivers/cxl/core/memdev.c | 8 ++++----
> drivers/cxl/mem.c | 2 +-
> 3 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
> index 47d9faf5897f..c5f70741d70a 100644
> --- a/drivers/cxl/core/hdm.c
> +++ b/drivers/cxl/core/hdm.c
> @@ -432,12 +432,12 @@ int cxl_dpa_set_mode(struct cxl_endpoint_decoder *cxled,
> * Only allow modes that are supported by the current partition
> * configuration
> */
> - if (mode == CXL_DECODER_PMEM && !resource_size(&cxlds->pmem_res)) {
> + if (mode == CXL_DECODER_PMEM && !cxlds->pmem_res.end) {
> dev_dbg(dev, "no available pmem capacity\n");
> rc = -ENXIO;
> goto out;
> }
> - if (mode == CXL_DECODER_RAM && !resource_size(&cxlds->ram_res)) {
> + if (mode == CXL_DECODER_RAM && !cxlds->ram_res.end) {
> dev_dbg(dev, "no available ram capacity\n");
> rc = -ENXIO;
> goto out;
> diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c
> index 0336b3f14f4a..b61d57d0d4f4 100644
> --- a/drivers/cxl/core/memdev.c
> +++ b/drivers/cxl/core/memdev.c
> @@ -197,14 +197,14 @@ static int cxl_get_poison_by_memdev(struct cxl_memdev *cxlmd)
> int rc = 0;
>
> /* CXL 3.0 Spec 8.2.9.8.4.1 Separate pmem and ram poison requests */
> - if (resource_size(&cxlds->pmem_res)) {
> + if (cxlds->pmem_res.end) {
> offset = cxlds->pmem_res.start;
> length = resource_size(&cxlds->pmem_res);
> rc = cxl_mem_get_poison(cxlmd, offset, length, NULL);
> if (rc)
> return rc;
> }
> - if (resource_size(&cxlds->ram_res)) {
> + if (cxlds->ram_res.end) {
> offset = cxlds->ram_res.start;
> length = resource_size(&cxlds->ram_res);
> rc = cxl_mem_get_poison(cxlmd, offset, length, NULL);
> @@ -266,7 +266,7 @@ static int __cxl_dpa_to_region(struct device *dev, void *arg)
> return 0;
>
> cxled = to_cxl_endpoint_decoder(dev);
> - if (!cxled->dpa_res || !resource_size(cxled->dpa_res))
> + if (!cxled->dpa_res || !cxled->dpa_res->end)
> return 0;
>
> if (dpa > cxled->dpa_res->end || dpa < cxled->dpa_res->start)
> @@ -302,7 +302,7 @@ static int cxl_validate_poison_dpa(struct cxl_memdev *cxlmd, u64 dpa)
> if (!IS_ENABLED(CONFIG_DEBUG_FS))
> return 0;
>
> - if (!resource_size(&cxlds->dpa_res)) {
> + if (!cxlds->dpa_res.end) {
> dev_dbg(cxlds->dev, "device has no dpa resource\n");
> return -EINVAL;
> }
> diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c
> index 6dc2bf1e2b1a..a168343d2d4d 100644
> --- a/drivers/cxl/mem.c
> +++ b/drivers/cxl/mem.c
> @@ -174,7 +174,7 @@ static int cxl_mem_probe(struct device *dev)
> if (rc)
> return rc;
>
> - if (resource_size(&cxlds->pmem_res) && IS_ENABLED(CONFIG_CXL_PMEM)) {
> + if (cxlds->pmem_res.end && IS_ENABLED(CONFIG_CXL_PMEM)) {
> rc = devm_cxl_add_nvdimm(cxlmd);
> if (rc == -ENODEV)
> dev_info(dev, "PMEM disabled by platform\n");
next prev parent reply other threads:[~2024-05-17 14:40 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-16 8:11 [RFC PATCH 00/13] RFC: add Type2 device support alucerop
2024-05-16 8:11 ` [RFC PATCH 01/13] cxl: move header files for absolute references alucerop
2024-06-12 4:27 ` Dan Williams
2024-06-12 4:30 ` Christoph Hellwig
2024-06-12 5:54 ` Alejandro Lucero Palau
2024-06-12 10:07 ` Jonathan Cameron
2024-06-12 13:36 ` Alejandro Lucero Palau
2024-06-12 21:18 ` Dan Williams
2024-06-13 11:45 ` Alejandro Lucero Palau
2024-06-14 1:22 ` Dan Williams
2024-06-14 8:54 ` Alejandro Lucero Palau
2024-06-12 5:42 ` Alejandro Lucero Palau
2024-05-16 8:11 ` [RFC PATCH 02/13] cxl: add type2 device basic support alucerop
2024-05-17 14:30 ` Jonathan Cameron
2024-05-20 15:46 ` Alejandro Lucero Palau
2024-06-12 4:43 ` Dan Williams
2024-06-12 6:04 ` Alejandro Lucero Palau
2024-06-12 14:17 ` Alejandro Lucero Palau
2024-06-12 18:29 ` Alison Schofield
2024-06-12 18:58 ` Dan Williams
2024-06-12 7:13 ` Alejandro Lucero Palau
2024-05-16 8:11 ` [RFC PATCH 03/13] cxl: export core function for type2 devices alucerop
2024-06-12 4:50 ` Dan Williams
2024-06-12 6:07 ` Alejandro Lucero Palau
2024-05-16 8:11 ` [RFC PATCH 04/13] cxl: allow devices without mailbox capability alucerop
2024-05-17 14:33 ` Jonathan Cameron
2024-05-20 15:49 ` Alejandro Lucero Palau
2024-05-16 8:11 ` [RFC PATCH 05/13] cxl: fix check about pmem resource alucerop
2024-05-17 14:40 ` Jonathan Cameron [this message]
2024-05-20 15:41 ` Alejandro Lucero Palau
2024-05-16 8:11 ` [RFC PATCH 06/13] cxl: support type2 memdev creation alucerop
2024-05-16 8:11 ` [RFC PATCH 07/13] cxl: add functions for exclusive access to endpoint port topology alucerop
2024-06-12 7:22 ` Alejandro Lucero Palau
2024-05-16 8:11 ` [RFC PATCH 08/13] cxl: add cxl_get_hpa_freespace alucerop
2024-06-12 7:27 ` Alejandro Lucero Palau
2024-05-16 8:11 ` [RFC PATCH 09/13] cxl: add cxl_request_dpa alucerop
2024-06-12 7:29 ` Alejandro Lucero Palau
2024-05-16 8:11 ` [RFC PATCH 10/13] cxl: make region type based on endpoint type alucerop
2024-05-16 8:12 ` [RFC PATCH 11/13] cxl: allow automatic region creation by type2 drivers alucerop
2024-06-12 7:32 ` Alejandro Lucero Palau
2024-05-16 8:12 ` [RFC PATCH 12/13] cxl: preclude device memory to be used for dax alucerop
2024-05-16 8:12 ` [RFC PATCH 13/13] cxl: test type2 private mapping alucerop
2024-05-17 0:08 ` [RFC PATCH 00/13] RFC: add Type2 device support Dan Williams
2024-05-18 9:59 ` Alejandro Lucero Palau
2024-05-21 4:56 ` Dan Williams
2024-05-22 16:38 ` Alejandro Lucero Palau
2024-05-31 10:52 ` Alejandro Lucero Palau
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