Linux CXL
 help / color / mirror / Atom feed
From: Alejandro Lucero Palau <alucerop@amd.com>
To: Dan Williams <dan.j.williams@intel.com>,
	linux-cxl@vger.kernel.org, pieter.jansen-van-vuuren@amd.com,
	richard.hughes@amd.com, dinan.gunawardena@amd.com
Subject: Re: [RFC PATCH 03/13] cxl: export core function for type2 devices
Date: Wed, 12 Jun 2024 07:07:08 +0100	[thread overview]
Message-ID: <30515d14-2cd6-1967-c656-e8b17ecfd8d7@amd.com> (raw)
In-Reply-To: <666928a27eefc_3101294c6@dwillia2-xfh.jf.intel.com.notmuch>


On 6/12/24 05:50, Dan Williams wrote:
> alucerop@ wrote:
>> From: Alejandro Lucero <alucerop@amd.com>
>>
>> CXL initialization by type2 devices requires to use current CXL kernel
>> infrastructure only available to such core code. Type2 devices are by
>> definition owned by specific vendor drivers which need to use part of
>> that infrastructure for initialization.
>>
>> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
>> ---
>>   drivers/cxl/pci.c                   |  3 ++-
>>   include/linux/cxlpci.h              |  2 ++
>>   tools/testing/cxl/type2/pci_type2.c | 31 +++++++++++++++++++++++++++++
>>   3 files changed, 35 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
>> index ccde33ac9c1c..497276302017 100644
>> --- a/drivers/cxl/pci.c
>> +++ b/drivers/cxl/pci.c
>> @@ -500,7 +500,7 @@ static int cxl_rcrb_get_comp_regs(struct pci_dev *pdev,
>>   	return 0;
>>   }
>>   
>> -static int cxl_pci_setup_regs(struct pci_dev *pdev, enum cxl_regloc_type type,
>> +int cxl_pci_setup_regs(struct pci_dev *pdev, enum cxl_regloc_type type,
>>   			      struct cxl_register_map *map)
>>   {
>>   	int rc;
>> @@ -520,6 +520,7 @@ static int cxl_pci_setup_regs(struct pci_dev *pdev, enum cxl_regloc_type type,
>>   
>>   	return cxl_setup_regs(map);
>>   }
>> +EXPORT_SYMBOL_NS_GPL(cxl_pci_setup_regs, CXL);
> Any functionality in cxl_pci that you want to export to a 3rd party CXL
> driver needs to move to drivers/cxl/core/pci.c


OK.


>>   
>>   static int cxl_pci_ras_unmask(struct pci_dev *pdev)
>>   {
>> diff --git a/include/linux/cxlpci.h b/include/linux/cxlpci.h
>> index 93992a1c8eec..28fa4861a4f9 100644
>> --- a/include/linux/cxlpci.h
>> +++ b/include/linux/cxlpci.h
>> @@ -130,4 +130,6 @@ void read_cdat_data(struct cxl_port *port);
>>   void cxl_cor_error_detected(struct pci_dev *pdev);
>>   pci_ers_result_t cxl_error_detected(struct pci_dev *pdev,
>>   				    pci_channel_state_t state);
>> +int cxl_pci_setup_regs(struct pci_dev *pdev, enum cxl_regloc_type type,
>> +		       struct cxl_register_map *map);
>>   #endif /* __CXL_PCI_H__ */
>> diff --git a/tools/testing/cxl/type2/pci_type2.c b/tools/testing/cxl/type2/pci_type2.c
>> index 863ce7dc28ef..b12f13e676fb 100644
>> --- a/tools/testing/cxl/type2/pci_type2.c
>> +++ b/tools/testing/cxl/type2/pci_type2.c
>> @@ -12,7 +12,9 @@ static int type2_pci_probe(struct pci_dev *pci_dev,
>>   			   const struct pci_device_id *entry)
>>   
>>   {
>> +	struct cxl_register_map map;
>>   	u16 dvsec;
>> +	int rc;
>>   
>>   	dvsec = pci_find_dvsec_capability(pci_dev, PCI_DVSEC_VENDOR_ID_CXL, CXL_DVSEC_PCIE_DEVICE);
>>   
>> @@ -35,6 +37,35 @@ static int type2_pci_probe(struct pci_dev *pci_dev,
>>   	cxlds->dpa_res = DEFINE_RES_MEM(0, CXL_TYPE2_MEM_SIZE);
>>   	cxlds->ram_res = DEFINE_RES_MEM_NAMED(0, CXL_TYPE2_MEM_SIZE, "ram");
>>   
>> +	rc = cxl_pci_setup_regs(pci_dev, CXL_REGLOC_RBI_MEMDEV, &map);
>> +	if (rc)
>> +		return rc;
>> +
>> +	rc = cxl_map_device_regs(&map, &cxlds->regs.device_regs);
>> +	if (rc)
>> +		return rc;
>> +
>> +	rc = cxl_pci_setup_regs(pci_dev, CXL_REGLOC_RBI_COMPONENT,
>> +				&cxlds->reg_map);
>> +	if (rc)
>> +		dev_warn(&pci_dev->dev, "No component registers (%d)\n", rc);
>> +
>> +	rc = cxl_map_component_regs(&cxlds->reg_map, &cxlds->regs.component,
>> +				    BIT(CXL_CM_CAP_CAP_ID_RAS));
>> +	if (rc)
>> +		dev_dbg(&pci_dev->dev, "Failed to map RAS capability.\n");
>> +
>> +	pci_info(pci_dev, "requesting resource...");
> Setting aside whether this driver moves forward vs a cxl_test mock, if
> you want the driver to be chatty use pci_dbg() or dev_dbg() not pci_info().
>

It seems this driver will be removed in future versions or probably in a 
new patchset.

Thanks


  reply	other threads:[~2024-06-12  6:07 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-16  8:11 [RFC PATCH 00/13] RFC: add Type2 device support alucerop
2024-05-16  8:11 ` [RFC PATCH 01/13] cxl: move header files for absolute references alucerop
2024-06-12  4:27   ` Dan Williams
2024-06-12  4:30     ` Christoph Hellwig
2024-06-12  5:54       ` Alejandro Lucero Palau
2024-06-12 10:07         ` Jonathan Cameron
2024-06-12 13:36           ` Alejandro Lucero Palau
2024-06-12 21:18       ` Dan Williams
2024-06-13 11:45         ` Alejandro Lucero Palau
2024-06-14  1:22           ` Dan Williams
2024-06-14  8:54             ` Alejandro Lucero Palau
2024-06-12  5:42     ` Alejandro Lucero Palau
2024-05-16  8:11 ` [RFC PATCH 02/13] cxl: add type2 device basic support alucerop
2024-05-17 14:30   ` Jonathan Cameron
2024-05-20 15:46     ` Alejandro Lucero Palau
2024-06-12  4:43   ` Dan Williams
2024-06-12  6:04     ` Alejandro Lucero Palau
2024-06-12 14:17       ` Alejandro Lucero Palau
2024-06-12 18:29     ` Alison Schofield
2024-06-12 18:58       ` Dan Williams
2024-06-12  7:13   ` Alejandro Lucero Palau
2024-05-16  8:11 ` [RFC PATCH 03/13] cxl: export core function for type2 devices alucerop
2024-06-12  4:50   ` Dan Williams
2024-06-12  6:07     ` Alejandro Lucero Palau [this message]
2024-05-16  8:11 ` [RFC PATCH 04/13] cxl: allow devices without mailbox capability alucerop
2024-05-17 14:33   ` Jonathan Cameron
2024-05-20 15:49     ` Alejandro Lucero Palau
2024-05-16  8:11 ` [RFC PATCH 05/13] cxl: fix check about pmem resource alucerop
2024-05-17 14:40   ` Jonathan Cameron
2024-05-20 15:41     ` Alejandro Lucero Palau
2024-05-16  8:11 ` [RFC PATCH 06/13] cxl: support type2 memdev creation alucerop
2024-05-16  8:11 ` [RFC PATCH 07/13] cxl: add functions for exclusive access to endpoint port topology alucerop
2024-06-12  7:22   ` Alejandro Lucero Palau
2024-05-16  8:11 ` [RFC PATCH 08/13] cxl: add cxl_get_hpa_freespace alucerop
2024-06-12  7:27   ` Alejandro Lucero Palau
2024-05-16  8:11 ` [RFC PATCH 09/13] cxl: add cxl_request_dpa alucerop
2024-06-12  7:29   ` Alejandro Lucero Palau
2024-05-16  8:11 ` [RFC PATCH 10/13] cxl: make region type based on endpoint type alucerop
2024-05-16  8:12 ` [RFC PATCH 11/13] cxl: allow automatic region creation by type2 drivers alucerop
2024-06-12  7:32   ` Alejandro Lucero Palau
2024-05-16  8:12 ` [RFC PATCH 12/13] cxl: preclude device memory to be used for dax alucerop
2024-05-16  8:12 ` [RFC PATCH 13/13] cxl: test type2 private mapping alucerop
2024-05-17  0:08 ` [RFC PATCH 00/13] RFC: add Type2 device support Dan Williams
2024-05-18  9:59   ` Alejandro Lucero Palau
2024-05-21  4:56     ` Dan Williams
2024-05-22 16:38       ` Alejandro Lucero Palau
2024-05-31 10:52         ` Alejandro Lucero Palau

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=30515d14-2cd6-1967-c656-e8b17ecfd8d7@amd.com \
    --to=alucerop@amd.com \
    --cc=dan.j.williams@intel.com \
    --cc=dinan.gunawardena@amd.com \
    --cc=linux-cxl@vger.kernel.org \
    --cc=pieter.jansen-van-vuuren@amd.com \
    --cc=richard.hughes@amd.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox