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From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Alejandro Lucero Palau <alucerop@amd.com>
Cc: Christoph Hellwig <hch@infradead.org>,
	Dan Williams <dan.j.williams@intel.com>,
	<linux-cxl@vger.kernel.org>, <pieter.jansen-van-vuuren@amd.com>,
	<richard.hughes@amd.com>, <dinan.gunawardena@amd.com>
Subject: Re: [RFC PATCH 01/13] cxl: move header files for absolute references
Date: Wed, 12 Jun 2024 11:07:52 +0100	[thread overview]
Message-ID: <20240612110752.00007442@Huawei.com> (raw)
In-Reply-To: <4dadbadf-529d-6f50-b30e-8a428d8c6a19@amd.com>

On Wed, 12 Jun 2024 06:54:13 +0100
Alejandro Lucero Palau <alucerop@amd.com> wrote:

> On 6/12/24 05:30, Christoph Hellwig wrote:
> > On Tue, Jun 11, 2024 at 09:27:38PM -0700, Dan Williams wrote:  
> >> alucerop@ wrote:  
> >>> From: Alejandro Lucero <alucerop@amd.com>
> >>>
> >>> CXL Type 2 devices imply specific vendor drivers binding to those
> >>> devices instead of generic ones offered by CXL core like the PCI driver.  
> > No, it absolutelt does not.  There is no such thing as a vendor driver
> > in Linux.  
> 
> 
> Well, yes, I see your point, and it is absolutely correct.
> 
> It was a bad way of explaining the need of a driver supporting a 
> specific hardware.
> 
> 
> >> So I don't like this approach, there are details that are private to the
> >> CXL generic memory-expander use case, and some that are suitable for
> >> CXL.mem and CXL.cache capabilities in other drivers. That distinct
> >> subset should move to include/linux/. I.e. I want to see the incremental
> >> conversion of what 3rd party drivers need compared to the generic
> >> expander case, and consider when and where new shared infrastructure
> >> needs to be refactored.  
> > And I'd much rather keep all these drivers in drivers/cxl/ anyway so
> > that we can keep a tight control over them.
> >  
> 
> My initial thought was drivers for ethernet, gpus, or any other kind of 
> standard device binding to the CXL/PCIe.io and doing the CXL 
> initialization. Your comment seems to suggest other approach, which I 
> can only relate to using auxbus for the device CXL.mem and CXL.cache, 
> and  then being handled by a generic driver inside the CXL core. Is this 
> what you are suggesting?
> 
> If so, I'm not against it, although it would require to study the 
> implications.

I'd be very careful with that level of complexity.
So far I'm not seeing it as useful for this case (but I could be wrong)

Maybe just a case of well defined library code with only
opaque state etc being exposed by the CXL driver framework.

The bulk of any type2 driver needs to be in the appropriate subsystem
not drivers/cxl/  The non CXL parts will be more important to keep
aligned with appropriate subsystem than the CXL part. 

Jonathan

> 
> 


  reply	other threads:[~2024-06-12 10:07 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-16  8:11 [RFC PATCH 00/13] RFC: add Type2 device support alucerop
2024-05-16  8:11 ` [RFC PATCH 01/13] cxl: move header files for absolute references alucerop
2024-06-12  4:27   ` Dan Williams
2024-06-12  4:30     ` Christoph Hellwig
2024-06-12  5:54       ` Alejandro Lucero Palau
2024-06-12 10:07         ` Jonathan Cameron [this message]
2024-06-12 13:36           ` Alejandro Lucero Palau
2024-06-12 21:18       ` Dan Williams
2024-06-13 11:45         ` Alejandro Lucero Palau
2024-06-14  1:22           ` Dan Williams
2024-06-14  8:54             ` Alejandro Lucero Palau
2024-06-12  5:42     ` Alejandro Lucero Palau
2024-05-16  8:11 ` [RFC PATCH 02/13] cxl: add type2 device basic support alucerop
2024-05-17 14:30   ` Jonathan Cameron
2024-05-20 15:46     ` Alejandro Lucero Palau
2024-06-12  4:43   ` Dan Williams
2024-06-12  6:04     ` Alejandro Lucero Palau
2024-06-12 14:17       ` Alejandro Lucero Palau
2024-06-12 18:29     ` Alison Schofield
2024-06-12 18:58       ` Dan Williams
2024-06-12  7:13   ` Alejandro Lucero Palau
2024-05-16  8:11 ` [RFC PATCH 03/13] cxl: export core function for type2 devices alucerop
2024-06-12  4:50   ` Dan Williams
2024-06-12  6:07     ` Alejandro Lucero Palau
2024-05-16  8:11 ` [RFC PATCH 04/13] cxl: allow devices without mailbox capability alucerop
2024-05-17 14:33   ` Jonathan Cameron
2024-05-20 15:49     ` Alejandro Lucero Palau
2024-05-16  8:11 ` [RFC PATCH 05/13] cxl: fix check about pmem resource alucerop
2024-05-17 14:40   ` Jonathan Cameron
2024-05-20 15:41     ` Alejandro Lucero Palau
2024-05-16  8:11 ` [RFC PATCH 06/13] cxl: support type2 memdev creation alucerop
2024-05-16  8:11 ` [RFC PATCH 07/13] cxl: add functions for exclusive access to endpoint port topology alucerop
2024-06-12  7:22   ` Alejandro Lucero Palau
2024-05-16  8:11 ` [RFC PATCH 08/13] cxl: add cxl_get_hpa_freespace alucerop
2024-06-12  7:27   ` Alejandro Lucero Palau
2024-05-16  8:11 ` [RFC PATCH 09/13] cxl: add cxl_request_dpa alucerop
2024-06-12  7:29   ` Alejandro Lucero Palau
2024-05-16  8:11 ` [RFC PATCH 10/13] cxl: make region type based on endpoint type alucerop
2024-05-16  8:12 ` [RFC PATCH 11/13] cxl: allow automatic region creation by type2 drivers alucerop
2024-06-12  7:32   ` Alejandro Lucero Palau
2024-05-16  8:12 ` [RFC PATCH 12/13] cxl: preclude device memory to be used for dax alucerop
2024-05-16  8:12 ` [RFC PATCH 13/13] cxl: test type2 private mapping alucerop
2024-05-17  0:08 ` [RFC PATCH 00/13] RFC: add Type2 device support Dan Williams
2024-05-18  9:59   ` Alejandro Lucero Palau
2024-05-21  4:56     ` Dan Williams
2024-05-22 16:38       ` Alejandro Lucero Palau
2024-05-31 10:52         ` Alejandro Lucero Palau

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