Re: [v3 1/4] cxl/pci: Fix to record only non-zero ranges

[Jonathan Cameron <Jonathan.Cameron@Huawei.com>]

On Tue, 13 Aug 2024 19:05:29 +0800
Yanfei Xu <yanfei.xu@intel.com> wrote:

> The function cxl_dvsec_rr_decode() retrieves and records DVSEC ranges
> into info->dvsec_range[], regardless of whether it is non-zero range,
> and the variable info->ranges indicates the number of non-zero ranges.
> However, in cxl_hdm_decode_init(), the validation for
> info->dvsec_range[] occurs in a for loop that iterates based on
> info->ranges. It may result in zero range to be validated but non-zero
> range not be validated, in turn, the number of allowed ranges is to be
> 0. Address it by only record non-zero ranges.
> 
> This fix is not urgent as it requires a configuration that zeroes out
> the first dvsec range while populating the second. This has not been
> observed, but it is theoretically possible. If this gets picked up for
> -stable, no harm done, but there is no urgency to backport.
> 
> Fixes: 560f78559006 ("cxl/pci: Retrieve CXL DVSEC memory info")
> Signed-off-by: Yanfei Xu <yanfei.xu@intel.com>

LGTM

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>