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From: Yanfei Xu <yanfei.xu@intel.com>
To: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
Cc: <linux-cxl@vger.kernel.org>, <dave@stgolabs.net>,
	<dave.jiang@intel.com>, <alison.schofield@intel.com>,
	<vishal.l.verma@intel.com>, <ira.weiny@intel.com>,
	<dan.j.williams@intel.com>, <ming4.li@intel.com>
Subject: Re: [v3 2/4] cxl/pci: Remove duplicated implementation of waiting for memory_info_valid
Date: Wed, 28 Aug 2024 10:49:42 +0800	[thread overview]
Message-ID: <485c6d87-6237-44ae-9317-5162d30e56f7@intel.com> (raw)
In-Reply-To: <20240827171606.0000603a@Huawei.com>



On 8/28/2024 12:16 AM, Jonathan Cameron wrote:
> On Tue, 13 Aug 2024 19:05:30 +0800
> Yanfei Xu <yanfei.xu@intel.com> wrote:
> 
>> commit ce17ad0d5498 ("cxl: Wait Memory_Info_Valid before access memory
>> related info") added another implementation of waiting for
>> memory_info_valid without realizing it duplicated wait_for_valid()
> Mention here the name of the other duplicate function
> 
> Also good to call out why you picked this duplicate to remove
> over the other one.
> 
> Otherwise looks good to me.
> So with that info added.
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

Thanks! will improve it in next version.

> 
>>
>> Suggested-by: Dan Williams <dan.j.williams@intel.com>
>> Signed-off-by: Yanfei Xu <yanfei.xu@intel.com>
>> ---
>>   drivers/cxl/core/pci.c        | 41 +++++------------------------------
>>   drivers/cxl/cxl.h             |  2 +-
>>   drivers/cxl/port.c            |  2 +-
>>   tools/testing/cxl/test/mock.c |  4 ++--
>>   4 files changed, 9 insertions(+), 40 deletions(-)
>>
>> diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
>> index 2d69340134da..38c567727dbb 100644
>> --- a/drivers/cxl/core/pci.c
>> +++ b/drivers/cxl/core/pci.c
>> @@ -211,37 +211,6 @@ int cxl_await_media_ready(struct cxl_dev_state *cxlds)
>>   }
>>   EXPORT_SYMBOL_NS_GPL(cxl_await_media_ready, CXL);
>>   
>> -static int wait_for_valid(struct pci_dev *pdev, int d)
>> -{
>> -	u32 val;
>> -	int rc;
>> -
>> -	/*
>> -	 * Memory_Info_Valid: When set, indicates that the CXL Range 1 Size high
>> -	 * and Size Low registers are valid. Must be set within 1 second of
>> -	 * deassertion of reset to CXL device. Likely it is already set by the
>> -	 * time this runs, but otherwise give a 1.5 second timeout in case of
>> -	 * clock skew.
>> -	 */
>> -	rc = pci_read_config_dword(pdev, d + CXL_DVSEC_RANGE_SIZE_LOW(0), &val);
>> -	if (rc)
>> -		return rc;
>> -
>> -	if (val & CXL_DVSEC_MEM_INFO_VALID)
>> -		return 0;
>> -
>> -	msleep(1500);
>> -
>> -	rc = pci_read_config_dword(pdev, d + CXL_DVSEC_RANGE_SIZE_LOW(0), &val);
>> -	if (rc)
>> -		return rc;
>> -
>> -	if (val & CXL_DVSEC_MEM_INFO_VALID)
>> -		return 0;
>> -
>> -	return -ETIMEDOUT;
>> -}
>> -
> 
> 


  reply	other threads:[~2024-08-28  2:49 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-13 11:05 [v3 0/4] Fixes for hdm docoder initialization from DVSEC ranges Yanfei Xu
2024-08-13 11:05 ` [v3 1/4] cxl/pci: Fix to record only non-zero ranges Yanfei Xu
2024-08-27 16:11   ` Jonathan Cameron
2024-08-13 11:05 ` [v3 2/4] cxl/pci: Remove duplicated implementation of waiting for memory_info_valid Yanfei Xu
2024-08-27 16:16   ` Jonathan Cameron
2024-08-28  2:49     ` Yanfei Xu [this message]
2024-08-13 11:05 ` [v3 3/4] cxl/pci: Check Mem_info_valid bit for each applicable DVSEC Yanfei Xu
2024-08-27 16:22   ` Jonathan Cameron
2024-08-28  2:54     ` Yanfei Xu
2024-08-13 11:05 ` [v3 4/4] cxl/pci: simplify the check of mem_enabled in cxl_hdm_decode_init() Yanfei Xu
2024-08-27 16:25   ` Jonathan Cameron
2024-08-27  5:04 ` [v3 0/4] Fixes for hdm docoder initialization from DVSEC ranges Yanfei Xu
2024-08-27 16:08 ` Jonathan Cameron
2024-08-28  2:45   ` Yanfei Xu

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