From: Terry Bowman <terry.bowman@amd.com>
To: <linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-pci@vger.kernel.org>, <nifan.cxl@gmail.com>,
<ming4.li@intel.com>, <dave@stgolabs.net>,
<jonathan.cameron@huawei.com>, <dave.jiang@intel.com>,
<alison.schofield@intel.com>, <vishal.l.verma@intel.com>,
<dan.j.williams@intel.com>, <bhelgaas@google.com>,
<mahesh@linux.ibm.com>, <ira.weiny@intel.com>, <oohall@gmail.com>,
<Benjamin.Cheatham@amd.com>, <rrichter@amd.com>,
<nathan.fontenot@amd.com>, <terry.bowman@amd.com>,
<Smita.KoralahalliChannabasappa@amd.com>, <lukas@wunner.de>
Subject: [PATCH v3 01/15] PCI/AER: Introduce 'struct cxl_err_handlers' and add to 'struct pci_driver'
Date: Wed, 13 Nov 2024 15:54:15 -0600 [thread overview]
Message-ID: <20241113215429.3177981-2-terry.bowman@amd.com> (raw)
In-Reply-To: <20241113215429.3177981-1-terry.bowman@amd.com>
CXL.io provides PCIe like protocol error implementation, but CXL.io and
PCIe have different handling requirements.
The PCIe AER service driver may attempt recovering PCIe devices with
uncorrectable errors while recovery is not used for CXL.io. Recovery is not
used in the CXL.io case because of the potential for corruption on what can
be system memory.
Create pci_driver::cxl_err_handlers similar to pci_driver::error_handler.
Create handlers for correctable and uncorrectable CXL.io error
handling.
The CXL error handlers will be used in future patches adding CXL PCIe
port protocol error handling.
Signed-off-by: Terry Bowman <terry.bowman@amd.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
---
include/linux/pci.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 573b4c4c2be6..106ac83e3a7b 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -886,6 +886,14 @@ struct pci_error_handlers {
void (*cor_error_detected)(struct pci_dev *dev);
};
+/* CXL bus error event callbacks */
+struct cxl_error_handlers {
+ /* CXL bus error detected on this device */
+ bool (*error_detected)(struct pci_dev *dev);
+
+ /* Allow device driver to record more details of a correctable error */
+ void (*cor_error_detected)(struct pci_dev *dev);
+};
struct module;
@@ -956,6 +964,7 @@ struct pci_driver {
int (*sriov_set_msix_vec_count)(struct pci_dev *vf, int msix_vec_count); /* On PF */
u32 (*sriov_get_vf_total_msix)(struct pci_dev *pf);
const struct pci_error_handlers *err_handler;
+ const struct cxl_error_handlers *cxl_err_handler;
const struct attribute_group **groups;
const struct attribute_group **dev_groups;
struct device_driver driver;
--
2.34.1
next prev parent reply other threads:[~2024-11-13 21:54 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-13 21:54 [PATCH v3 0/15] Enable CXL PCIe port protocol error handling and logging Terry Bowman
2024-11-13 21:54 ` Terry Bowman [this message]
2024-11-13 21:54 ` [PATCH v3 02/15] PCI/AER: Rename AER driver's interfaces to also indicate CXL PCIe port support Terry Bowman
2024-11-13 21:54 ` [PATCH v3 03/15] cxl/pci: Introduce PCIe helper functions pcie_is_cxl() and pcie_is_cxl_port() Terry Bowman
2024-11-14 15:45 ` Lukas Wunner
2024-11-14 16:45 ` Bowman, Terry
2024-11-14 16:52 ` Lukas Wunner
2024-11-14 17:07 ` Bowman, Terry
2024-11-15 8:47 ` Lukas Wunner
2024-11-15 13:54 ` Bowman, Terry
2024-11-17 17:02 ` Lukas Wunner
2024-11-19 12:20 ` Bowman, Terry
2024-11-13 21:54 ` [PATCH v3 04/15] PCI/AER: Modify AER driver logging to report CXL or PCIe bus error type Terry Bowman
2024-11-13 21:54 ` [PATCH v3 05/15] PCI/AER: Add CXL PCIe port correctable error support in AER service driver Terry Bowman
2024-11-14 16:44 ` Lukas Wunner
2024-11-14 18:41 ` Bowman, Terry
2024-11-15 8:51 ` Lukas Wunner
2024-11-15 13:56 ` Bowman, Terry
2024-11-15 14:49 ` Li Ming
2024-11-15 19:46 ` Bowman, Terry
2024-11-17 7:38 ` Li Ming
2024-11-27 17:03 ` Jonathan Cameron
2024-11-27 20:29 ` Bowman, Terry
2024-11-13 21:54 ` [PATCH v3 06/15] PCI/AER: Change AER driver to read UCE fatal status for all CXL PCIe port devices Terry Bowman
2024-11-15 9:35 ` Lukas Wunner
2024-11-21 20:24 ` Bowman, Terry
2024-11-27 17:05 ` Jonathan Cameron
2024-11-27 20:53 ` Bowman, Terry
2024-11-13 21:54 ` [PATCH v3 07/15] PCI/AER: Add CXL PCIe port uncorrectable error recovery in AER service driver Terry Bowman
2024-11-18 10:37 ` Lukas Wunner
2024-11-19 12:23 ` Bowman, Terry
2024-11-13 21:54 ` [PATCH v3 08/15] cxl/pci: Map CXL PCIe root port and downstream switch port RAS registers Terry Bowman
2024-11-15 15:28 ` Li Ming
2024-11-15 19:33 ` Bowman, Terry
2024-11-16 14:49 ` kernel test robot
2024-11-17 7:45 ` Li Ming
2024-11-18 2:21 ` Li Ming
2024-11-19 12:28 ` Bowman, Terry
2024-11-13 21:54 ` [PATCH v3 09/15] cxl/pci: Map CXL PCIe upstream " Terry Bowman
2024-11-13 21:54 ` [PATCH v3 10/15] cxl/pci: Update RAS handler interfaces to also support CXL PCIe ports Terry Bowman
2024-11-13 21:54 ` [PATCH v3 11/15] cxl/pci: Change find_cxl_port() to non-static Terry Bowman
2024-11-13 21:54 ` [PATCH v3 12/15] cxl/pci: Add error handler for CXL PCIe port RAS errors Terry Bowman
2024-11-13 21:54 ` [PATCH v3 13/15] cxl/pci: Add trace logging " Terry Bowman
2024-11-13 21:54 ` [PATCH v3 14/15] cxl/pci: Add support to assign and clear pci_driver::cxl_err_handlers Terry Bowman
2024-11-13 21:54 ` [PATCH v3 15/15] PCI/AER: Enable internal errors for CXL upstream and downstream switch ports Terry Bowman
2024-11-18 11:54 ` Lukas Wunner
2024-11-21 22:25 ` Bowman, Terry
2024-11-21 22:32 ` Lukas Wunner
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