From: Terry Bowman <terry.bowman@amd.com>
To: <linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-pci@vger.kernel.org>, <nifan.cxl@gmail.com>,
<ming4.li@intel.com>, <dave@stgolabs.net>,
<jonathan.cameron@huawei.com>, <dave.jiang@intel.com>,
<alison.schofield@intel.com>, <vishal.l.verma@intel.com>,
<dan.j.williams@intel.com>, <bhelgaas@google.com>,
<mahesh@linux.ibm.com>, <ira.weiny@intel.com>, <oohall@gmail.com>,
<Benjamin.Cheatham@amd.com>, <rrichter@amd.com>,
<nathan.fontenot@amd.com>, <terry.bowman@amd.com>,
<Smita.KoralahalliChannabasappa@amd.com>, <lukas@wunner.de>
Subject: [PATCH v3 06/15] PCI/AER: Change AER driver to read UCE fatal status for all CXL PCIe port devices
Date: Wed, 13 Nov 2024 15:54:20 -0600 [thread overview]
Message-ID: <20241113215429.3177981-7-terry.bowman@amd.com> (raw)
In-Reply-To: <20241113215429.3177981-1-terry.bowman@amd.com>
The AER service driver's aer_get_device_error_info() function doesn't read
uncorrectable (UCE) fatal error status from PCIe upstream port devices,
including CXL upstream switch ports. As a result, fatal errors are not
logged or handled as needed for CXL PCIe upstream switch port devices.
Update the aer_get_device_error_info() function to read the UCE fatal
status for all CXL PCIe port devices. Make the change to not affect
non-CXL PCIe devices.
The fatal error status will be used in future patches implementing
CXL PCIe port uncorrectable error handling and logging.
Signed-off-by: Terry Bowman <terry.bowman@amd.com>
---
drivers/pci/pcie/aer.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
index 1d3e5b929661..bb34e205e082 100644
--- a/drivers/pci/pcie/aer.c
+++ b/drivers/pci/pcie/aer.c
@@ -1250,7 +1250,8 @@ int aer_get_device_error_info(struct pci_dev *dev, struct aer_err_info *info)
} else if (type == PCI_EXP_TYPE_ROOT_PORT ||
type == PCI_EXP_TYPE_RC_EC ||
type == PCI_EXP_TYPE_DOWNSTREAM ||
- info->severity == AER_NONFATAL) {
+ info->severity == AER_NONFATAL ||
+ (pcie_is_cxl(dev) && type == PCI_EXP_TYPE_UPSTREAM)) {
/* Link is still healthy for IO reads */
pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS,
--
2.34.1
next prev parent reply other threads:[~2024-11-13 21:55 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-13 21:54 [PATCH v3 0/15] Enable CXL PCIe port protocol error handling and logging Terry Bowman
2024-11-13 21:54 ` [PATCH v3 01/15] PCI/AER: Introduce 'struct cxl_err_handlers' and add to 'struct pci_driver' Terry Bowman
2024-11-13 21:54 ` [PATCH v3 02/15] PCI/AER: Rename AER driver's interfaces to also indicate CXL PCIe port support Terry Bowman
2024-11-13 21:54 ` [PATCH v3 03/15] cxl/pci: Introduce PCIe helper functions pcie_is_cxl() and pcie_is_cxl_port() Terry Bowman
2024-11-14 15:45 ` Lukas Wunner
2024-11-14 16:45 ` Bowman, Terry
2024-11-14 16:52 ` Lukas Wunner
2024-11-14 17:07 ` Bowman, Terry
2024-11-15 8:47 ` Lukas Wunner
2024-11-15 13:54 ` Bowman, Terry
2024-11-17 17:02 ` Lukas Wunner
2024-11-19 12:20 ` Bowman, Terry
2024-11-13 21:54 ` [PATCH v3 04/15] PCI/AER: Modify AER driver logging to report CXL or PCIe bus error type Terry Bowman
2024-11-13 21:54 ` [PATCH v3 05/15] PCI/AER: Add CXL PCIe port correctable error support in AER service driver Terry Bowman
2024-11-14 16:44 ` Lukas Wunner
2024-11-14 18:41 ` Bowman, Terry
2024-11-15 8:51 ` Lukas Wunner
2024-11-15 13:56 ` Bowman, Terry
2024-11-15 14:49 ` Li Ming
2024-11-15 19:46 ` Bowman, Terry
2024-11-17 7:38 ` Li Ming
2024-11-27 17:03 ` Jonathan Cameron
2024-11-27 20:29 ` Bowman, Terry
2024-11-13 21:54 ` Terry Bowman [this message]
2024-11-15 9:35 ` [PATCH v3 06/15] PCI/AER: Change AER driver to read UCE fatal status for all CXL PCIe port devices Lukas Wunner
2024-11-21 20:24 ` Bowman, Terry
2024-11-27 17:05 ` Jonathan Cameron
2024-11-27 20:53 ` Bowman, Terry
2024-11-13 21:54 ` [PATCH v3 07/15] PCI/AER: Add CXL PCIe port uncorrectable error recovery in AER service driver Terry Bowman
2024-11-18 10:37 ` Lukas Wunner
2024-11-19 12:23 ` Bowman, Terry
2024-11-13 21:54 ` [PATCH v3 08/15] cxl/pci: Map CXL PCIe root port and downstream switch port RAS registers Terry Bowman
2024-11-15 15:28 ` Li Ming
2024-11-15 19:33 ` Bowman, Terry
2024-11-16 14:49 ` kernel test robot
2024-11-17 7:45 ` Li Ming
2024-11-18 2:21 ` Li Ming
2024-11-19 12:28 ` Bowman, Terry
2024-11-13 21:54 ` [PATCH v3 09/15] cxl/pci: Map CXL PCIe upstream " Terry Bowman
2024-11-13 21:54 ` [PATCH v3 10/15] cxl/pci: Update RAS handler interfaces to also support CXL PCIe ports Terry Bowman
2024-11-13 21:54 ` [PATCH v3 11/15] cxl/pci: Change find_cxl_port() to non-static Terry Bowman
2024-11-13 21:54 ` [PATCH v3 12/15] cxl/pci: Add error handler for CXL PCIe port RAS errors Terry Bowman
2024-11-13 21:54 ` [PATCH v3 13/15] cxl/pci: Add trace logging " Terry Bowman
2024-11-13 21:54 ` [PATCH v3 14/15] cxl/pci: Add support to assign and clear pci_driver::cxl_err_handlers Terry Bowman
2024-11-13 21:54 ` [PATCH v3 15/15] PCI/AER: Enable internal errors for CXL upstream and downstream switch ports Terry Bowman
2024-11-18 11:54 ` Lukas Wunner
2024-11-21 22:25 ` Bowman, Terry
2024-11-21 22:32 ` Lukas Wunner
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