From: Robert Richter <rrichter@amd.com>
To: Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Dave Jiang <dave.jiang@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>
Cc: <linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Gregory Price <gourry@gourry.net>,
"Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>,
Terry Bowman <terry.bowman@amd.com>,
Robert Richter <rrichter@amd.com>
Subject: [PATCH v3 08/18] cxl/region: Move find_cxl_root() to cxl_add_to_region()
Date: Tue, 11 Feb 2025 10:53:38 +0100 [thread overview]
Message-ID: <20250211095349.981096-9-rrichter@amd.com> (raw)
In-Reply-To: <20250211095349.981096-1-rrichter@amd.com>
When adding an endpoint to a region, the root port is determined
first. Move this directly into cxl_add_to_region(). This is in
preparation of the initialization of endpoints that iterates the port
hierarchy from the endpoint up to the root port.
As a side-effect the root argument is removed from the argument lists
of cxl_add_to_region() and related functions. Now, the endpoint is the
only parameter to add a region. This simplifies the function
interface.
Signed-off-by: Robert Richter <rrichter@amd.com>
Reviewed-by: Gregory Price <gourry@gourry.net>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Tested-by: Gregory Price <gourry@gourry.net>
---
drivers/cxl/core/region.c | 6 ++++--
drivers/cxl/cxl.h | 6 ++----
drivers/cxl/port.c | 15 +++------------
3 files changed, 9 insertions(+), 18 deletions(-)
diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
index b8201c2faa87..0e38bcb43be6 100644
--- a/drivers/cxl/core/region.c
+++ b/drivers/cxl/core/region.c
@@ -3312,9 +3312,11 @@ static struct cxl_region *construct_region(struct cxl_root_decoder *cxlrd,
return ERR_PTR(rc);
}
-int cxl_add_to_region(struct cxl_port *root, struct cxl_endpoint_decoder *cxled)
+int cxl_add_to_region(struct cxl_endpoint_decoder *cxled)
{
struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);
+ struct cxl_port *port = cxled_to_port(cxled);
+ struct cxl_root *cxl_root __free(put_cxl_root) = find_cxl_root(port);
struct range *hpa = &cxled->cxld.hpa_range;
struct cxl_decoder *cxld = &cxled->cxld;
struct device *cxlrd_dev, *region_dev;
@@ -3324,7 +3326,7 @@ int cxl_add_to_region(struct cxl_port *root, struct cxl_endpoint_decoder *cxled)
bool attach = false;
int rc;
- cxlrd_dev = device_find_child(&root->dev, &cxld->hpa_range,
+ cxlrd_dev = device_find_child(&cxl_root->port.dev, &cxld->hpa_range,
match_root_decoder_by_range);
if (!cxlrd_dev) {
dev_err(cxlmd->dev.parent,
diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index 0d7aff8b97b3..85dfc8df0a80 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -854,8 +854,7 @@ struct cxl_nvdimm_bridge *cxl_find_nvdimm_bridge(struct cxl_port *port);
#ifdef CONFIG_CXL_REGION
bool is_cxl_pmem_region(struct device *dev);
struct cxl_pmem_region *to_cxl_pmem_region(struct device *dev);
-int cxl_add_to_region(struct cxl_port *root,
- struct cxl_endpoint_decoder *cxled);
+int cxl_add_to_region(struct cxl_endpoint_decoder *cxled);
struct cxl_dax_region *to_cxl_dax_region(struct device *dev);
#else
static inline bool is_cxl_pmem_region(struct device *dev)
@@ -866,8 +865,7 @@ static inline struct cxl_pmem_region *to_cxl_pmem_region(struct device *dev)
{
return NULL;
}
-static inline int cxl_add_to_region(struct cxl_port *root,
- struct cxl_endpoint_decoder *cxled)
+static inline int cxl_add_to_region(struct cxl_endpoint_decoder *cxled)
{
return 0;
}
diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c
index d2bfd1ff5492..74587a403e3d 100644
--- a/drivers/cxl/port.c
+++ b/drivers/cxl/port.c
@@ -30,7 +30,7 @@ static void schedule_detach(void *cxlmd)
schedule_cxl_memdev_detach(cxlmd);
}
-static int discover_region(struct device *dev, void *root)
+static int discover_region(struct device *dev, void *unused)
{
struct cxl_endpoint_decoder *cxled;
int rc;
@@ -49,7 +49,7 @@ static int discover_region(struct device *dev, void *root)
* Region enumeration is opportunistic, if this add-event fails,
* continue to the next endpoint decoder.
*/
- rc = cxl_add_to_region(root, cxled);
+ rc = cxl_add_to_region(cxled);
if (rc)
dev_dbg(dev, "failed to add to region: %#llx-%#llx\n",
cxled->cxld.hpa_range.start, cxled->cxld.hpa_range.end);
@@ -95,7 +95,6 @@ static int cxl_endpoint_port_probe(struct cxl_port *port)
struct cxl_memdev *cxlmd = to_cxl_memdev(port->uport_dev);
struct cxl_dev_state *cxlds = cxlmd->cxlds;
struct cxl_hdm *cxlhdm;
- struct cxl_port *root;
int rc;
rc = cxl_dvsec_rr_decode(cxlds, &info);
@@ -126,19 +125,11 @@ static int cxl_endpoint_port_probe(struct cxl_port *port)
if (rc)
return rc;
- /*
- * This can't fail in practice as CXL root exit unregisters all
- * descendant ports and that in turn synchronizes with cxl_port_probe()
- */
- struct cxl_root *cxl_root __free(put_cxl_root) = find_cxl_root(port);
-
- root = &cxl_root->port;
-
/*
* Now that all endpoint decoders are successfully enumerated, try to
* assemble regions from committed decoders
*/
- device_for_each_child(&port->dev, root, discover_region);
+ device_for_each_child(&port->dev, NULL, discover_region);
return 0;
}
--
2.39.5
next prev parent reply other threads:[~2025-02-11 9:54 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-11 9:53 [PATCH v3 00/18] cxl: Address translation support, part 1: Cleanups and refactoring Robert Richter
2025-02-11 9:53 ` [PATCH v3 01/18] cxl: Remove else after return Robert Richter
2025-02-11 9:53 ` [PATCH v3 02/18] cxl/pci: Moving code in cxl_hdm_decode_init() Robert Richter
2025-02-12 17:57 ` Jonathan Cameron
2025-02-20 1:03 ` Dave Jiang
2025-02-11 9:53 ` [PATCH v3 03/18] cxl/pci: cxl_hdm_decode_init: Move comment Robert Richter
2025-02-12 18:09 ` Jonathan Cameron
2025-02-13 0:35 ` Robert Richter
2025-02-14 15:49 ` Jonathan Cameron
2025-03-06 9:38 ` Robert Richter
2025-02-11 9:53 ` [PATCH v3 04/18] cxl/pci: Add comments to cxl_hdm_decode_init() Robert Richter
2025-02-14 15:51 ` Jonathan Cameron
2025-02-11 9:53 ` [PATCH v3 05/18] cxl: Introduce parent_port_of() helper Robert Richter
2025-02-20 16:12 ` Dave Jiang
2025-02-11 9:53 ` [PATCH v3 06/18] cxl/region: Rename function to cxl_find_decoder_early() Robert Richter
2025-02-14 15:58 ` Jonathan Cameron
2025-03-05 12:48 ` Robert Richter
2025-02-11 9:53 ` [PATCH v3 07/18] cxl/region: Avoid duplicate call of cxl_find_decoder_early() Robert Richter
2025-02-14 16:07 ` Jonathan Cameron
2025-03-06 9:16 ` Robert Richter
2025-02-11 9:53 ` Robert Richter [this message]
2025-02-20 16:39 ` [PATCH v3 08/18] cxl/region: Move find_cxl_root() to cxl_add_to_region() Dave Jiang
2025-02-11 9:53 ` [PATCH v3 09/18] cxl/region: Factor out code to find the root decoder Robert Richter
2025-02-20 16:48 ` Dave Jiang
2025-02-11 9:53 ` [PATCH v3 10/18] cxl/region: Factor out code to find a root decoder's region Robert Richter
2025-02-14 16:15 ` Jonathan Cameron
2025-02-20 16:50 ` Dave Jiang
2025-02-11 9:53 ` [PATCH v3 11/18] cxl/region: Split region registration into an initialization and adding part Robert Richter
2025-02-14 16:24 ` Jonathan Cameron
2025-02-11 9:53 ` [PATCH v3 12/18] cxl/region: Use iterator to find the root port in cxl_find_root_decoder() Robert Richter
2025-02-20 17:17 ` Dave Jiang
2025-02-11 9:53 ` [PATCH v3 13/18] cxl/region: Add function to find a port's switch decoder by range Robert Richter
2025-02-14 16:29 ` Jonathan Cameron
2025-02-20 17:23 ` Dave Jiang
2025-02-11 9:53 ` [PATCH v3 14/18] cxl/region: Unfold cxl_find_root_decoder() into cxl_endpoint_decoder_initialize() Robert Richter
2025-02-14 16:33 ` Jonathan Cameron
2025-03-06 16:18 ` Robert Richter
2025-02-11 9:53 ` [PATCH v3 15/18] cxl/region: Add a dev_warn() on registration failure Robert Richter
2025-02-14 16:35 ` Jonathan Cameron
2025-02-20 17:35 ` Dave Jiang
2025-02-11 9:53 ` [PATCH v3 16/18] cxl/region: Add a dev_err() on missing target list entries Robert Richter
2025-02-14 16:36 ` Jonathan Cameron
2025-02-20 17:44 ` Dave Jiang
2025-02-11 9:53 ` [PATCH v3 17/18] cxl: Add a dev_dbg() when a decoder was added to a port Robert Richter
2025-02-14 16:37 ` Jonathan Cameron
2025-02-20 17:45 ` Dave Jiang
2025-02-11 9:53 ` [PATCH v3 18/18] cxl/acpi: Unify CFMWS memory log messages with SRAT messages Robert Richter
2025-02-14 16:37 ` Jonathan Cameron
2025-02-20 17:46 ` Dave Jiang
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