[PATCH v2 0/3] cxl/test: Add unit testing for extended linear cache

[PATCH v2 0/3] cxl/test: Add unit testing for extended linear cache

[Dave Jiang]

v2:
- Use a global variable 'mock_auto_region_size' instead of a static define.
  Expectation is LMH will change that value for its testing.

The series adds support for mocking of extended linear cache support
in cxl_test. A module parameter is introduced to activate the mocking.
Tests will be added to CXL CLI user tools for regression testing.

This series depends on the patch [1] that provides the extended linear
cache size via sysfs.

[1]: https://lore.kernel.org/linux-cxl/20251022203052.4078527-1-dave.jiang@intel.com/

Dave Jiang (3):
  cxl/test: Standardize CXL auto region size
  cxl/test: Add cxl_test CFMWS support for extended linear cache
  cxl/test: Add support for acpi extended linear cache

 tools/testing/cxl/Kbuild      |  1 +
 tools/testing/cxl/test/cxl.c  | 56 ++++++++++++++++++++++++++++++++---
 tools/testing/cxl/test/mock.c | 20 +++++++++++++
 tools/testing/cxl/test/mock.h |  3 ++
 4 files changed, 76 insertions(+), 4 deletions(-)


base-commit: e9a6fb0bcdd7609be6969112f3fbfcce3b1d4a7c
-- 
2.51.1

[PATCH v2 1/3] cxl/test: Standardize CXL auto region size

[Dave Jiang]

Create a global define for the size of the mock CXL auto region used
in cxl_test. Remove the declared size in mock_init_hdm_decoder()
function.

Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---
v2:
- Make auto region size a global that can be changed at init. (Fabio)
---
 tools/testing/cxl/test/cxl.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c
index 2d135ca533d0..f0e734536081 100644
--- a/tools/testing/cxl/test/cxl.c
+++ b/tools/testing/cxl/test/cxl.c
@@ -26,6 +26,9 @@ static int interleave_arithmetic;
 #define NR_CXL_PORT_DECODERS 8
 #define NR_BRIDGES (NR_CXL_HOST_BRIDGES + NR_CXL_SINGLE_HOST + NR_CXL_RCH)
 
+#define MOCK_AUTO_REGION_SIZE_DEFAULT SZ_512M
+static int mock_auto_region_size = MOCK_AUTO_REGION_SIZE_DEFAULT;
+
 static struct platform_device *cxl_acpi;
 static struct platform_device *cxl_host_bridge[NR_CXL_HOST_BRIDGES];
 #define NR_MULTI_ROOT (NR_CXL_HOST_BRIDGES * NR_CXL_ROOT_PORTS)
@@ -738,7 +741,6 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
 	struct cxl_endpoint_decoder *cxled;
 	struct cxl_switch_decoder *cxlsd;
 	struct cxl_port *port, *iter;
-	const int size = SZ_512M;
 	struct cxl_memdev *cxlmd;
 	struct cxl_dport *dport;
 	struct device *dev;
@@ -783,7 +785,7 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
 	base = window->base_hpa;
 	cxld->hpa_range = (struct range) {
 		.start = base,
-		.end = base + size - 1,
+		.end = base + mock_auto_region_size - 1,
 	};
 
 	cxld->interleave_ways = 2;
@@ -792,7 +794,8 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
 	cxld->flags = CXL_DECODER_F_ENABLE;
 	cxled->state = CXL_DECODER_STATE_AUTO;
 	port->commit_end = cxld->id;
-	devm_cxl_dpa_reserve(cxled, 0, size / cxld->interleave_ways, 0);
+	devm_cxl_dpa_reserve(cxled, 0,
+			     mock_auto_region_size / cxld->interleave_ways, 0);
 	cxld->commit = mock_decoder_commit;
 	cxld->reset = mock_decoder_reset;
 
@@ -841,7 +844,7 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
 		cxld->interleave_granularity = 4096;
 		cxld->hpa_range = (struct range) {
 			.start = base,
-			.end = base + size - 1,
+			.end = base + mock_auto_region_size - 1,
 		};
 		put_device(dev);
 	}
-- 
2.51.1

Re: [PATCH v2 1/3] cxl/test: Standardize CXL auto region size

[Fabio M. De Francesco]

On Monday, November 17, 2025 3:46:09 PM Central European Standard Time Dave Jiang wrote:
> Create a global define for the size of the mock CXL auto region used
> in cxl_test. Remove the declared size in mock_init_hdm_decoder()
> function.
> 
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> ---
> v2:
> - Make auto region size a global that can be changed at init. (Fabio)
> ---

Reviewed-by: Fabio M. De Francesco <fabio.m.de.francesco@linux.intel.com>

>  tools/testing/cxl/test/cxl.c | 11 +++++++----
>  1 file changed, 7 insertions(+), 4 deletions(-)
> 
> diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c
> index 2d135ca533d0..f0e734536081 100644
> --- a/tools/testing/cxl/test/cxl.c
> +++ b/tools/testing/cxl/test/cxl.c
> @@ -26,6 +26,9 @@ static int interleave_arithmetic;
>  #define NR_CXL_PORT_DECODERS 8
>  #define NR_BRIDGES (NR_CXL_HOST_BRIDGES + NR_CXL_SINGLE_HOST + NR_CXL_RCH)
>  
> +#define MOCK_AUTO_REGION_SIZE_DEFAULT SZ_512M
> +static int mock_auto_region_size = MOCK_AUTO_REGION_SIZE_DEFAULT;
> +
>  static struct platform_device *cxl_acpi;
>  static struct platform_device *cxl_host_bridge[NR_CXL_HOST_BRIDGES];
>  #define NR_MULTI_ROOT (NR_CXL_HOST_BRIDGES * NR_CXL_ROOT_PORTS)
> @@ -738,7 +741,6 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
>  	struct cxl_endpoint_decoder *cxled;
>  	struct cxl_switch_decoder *cxlsd;
>  	struct cxl_port *port, *iter;
> -	const int size = SZ_512M;
>  	struct cxl_memdev *cxlmd;
>  	struct cxl_dport *dport;
>  	struct device *dev;
> @@ -783,7 +785,7 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
>  	base = window->base_hpa;
>  	cxld->hpa_range = (struct range) {
>  		.start = base,
> -		.end = base + size - 1,
> +		.end = base + mock_auto_region_size - 1,
>  	};
>  
>  	cxld->interleave_ways = 2;
> @@ -792,7 +794,8 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
>  	cxld->flags = CXL_DECODER_F_ENABLE;
>  	cxled->state = CXL_DECODER_STATE_AUTO;
>  	port->commit_end = cxld->id;
> -	devm_cxl_dpa_reserve(cxled, 0, size / cxld->interleave_ways, 0);
> +	devm_cxl_dpa_reserve(cxled, 0,
> +			     mock_auto_region_size / cxld->interleave_ways, 0);
>  	cxld->commit = mock_decoder_commit;
>  	cxld->reset = mock_decoder_reset;
>  
> @@ -841,7 +844,7 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
>  		cxld->interleave_granularity = 4096;
>  		cxld->hpa_range = (struct range) {
>  			.start = base,
> -			.end = base + size - 1,
> +			.end = base + mock_auto_region_size - 1,
>  		};
>  		put_device(dev);
>  	}
> -- 
> 2.51.1
> 
> 
> 

[PATCH v2 2/3] cxl/test: Add cxl_test CFMWS support for extended linear cache

[Dave Jiang]

Add a module parameter to allow activation of extended linear cache
on the auto region for cxl_test. The current platform implementation
for extended linear cache is 1:1 of DRAM and CXL memory. A CFMWS is
created with the size of both memory together where DRAM takes the
first part of the memory range and CXL covers the second part. The
current CXL auto region on cxl_test consists of 2 256M devices that
creates a 512M region. The new extended linear cache setup will have
512M DRAM and 512M CXL memory for a total of 1G CFMWS. The hardware
decoders must have their starting offset moved to after the DRAM region
to handle the CXL regions.

Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---
v2:
- change to use mock_auto_region_size
---
 tools/testing/cxl/test/cxl.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c
index f0e734536081..2c3979c0b505 100644
--- a/tools/testing/cxl/test/cxl.c
+++ b/tools/testing/cxl/test/cxl.c
@@ -15,6 +15,7 @@
 #include "mock.h"
 
 static int interleave_arithmetic;
+static bool extended_linear_cache;
 
 #define FAKE_QTG_ID	42
 
@@ -429,6 +430,24 @@ static struct cxl_mock_res *alloc_mock_res(resource_size_t size, int align)
 	return res;
 }
 
+/*
+ * Only update CFMWS0 as this is used by the auto region.
+ */
+static void cfmws_elc_update(struct acpi_cedt_cfmws *window, int index)
+{
+	if (!extended_linear_cache)
+		return;
+
+	if (index != 0)
+		return;
+
+	/*
+	 * The window size should be 2x of the CXL region size where half is
+	 * DRAM and half is CXL
+	 */
+	window->window_size = mock_auto_region_size * 2;
+}
+
 static int populate_cedt(void)
 {
 	struct cxl_mock_res *res;
@@ -453,6 +472,7 @@ static int populate_cedt(void)
 	for (i = cfmws_start; i <= cfmws_end; i++) {
 		struct acpi_cedt_cfmws *window = mock_cfmws[i];
 
+		cfmws_elc_update(window, i);
 		res = alloc_mock_res(window->window_size, SZ_256M);
 		if (!res)
 			return -ENOMEM;
@@ -783,6 +803,8 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
 	}
 
 	base = window->base_hpa;
+	if (extended_linear_cache)
+		base += mock_auto_region_size;
 	cxld->hpa_range = (struct range) {
 		.start = base,
 		.end = base + mock_auto_region_size - 1,
@@ -1609,6 +1631,8 @@ static __exit void cxl_test_exit(void)
 
 module_param(interleave_arithmetic, int, 0444);
 MODULE_PARM_DESC(interleave_arithmetic, "Modulo:0, XOR:1");
+module_param(extended_linear_cache, bool, 0444);
+MODULE_PARM_DESC(extended_linear_cache, "Enable extended linear cache support");
 module_init(cxl_test_init);
 module_exit(cxl_test_exit);
 MODULE_LICENSE("GPL v2");
-- 
2.51.1

Re: [PATCH v2 2/3] cxl/test: Add cxl_test CFMWS support for extended linear cache

[Fabio M. De Francesco]

On Monday, November 17, 2025 3:46:10 PM Central European Standard Time Dave Jiang wrote:
> Add a module parameter to allow activation of extended linear cache
> on the auto region for cxl_test. The current platform implementation
> for extended linear cache is 1:1 of DRAM and CXL memory. A CFMWS is
> created with the size of both memory together where DRAM takes the
> first part of the memory range and CXL covers the second part. The
> current CXL auto region on cxl_test consists of 2 256M devices that
> creates a 512M region. The new extended linear cache setup will have
> 512M DRAM and 512M CXL memory for a total of 1G CFMWS. The hardware
> decoders must have their starting offset moved to after the DRAM region
> to handle the CXL regions.
> 
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> ---
> v2:
> - change to use mock_auto_region_size
> ---

Reviewed-by: Fabio M. De Francesco <fabio.m.de.francesco@linux.intel.com>

>  tools/testing/cxl/test/cxl.c | 24 ++++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c
> index f0e734536081..2c3979c0b505 100644
> --- a/tools/testing/cxl/test/cxl.c
> +++ b/tools/testing/cxl/test/cxl.c
> @@ -15,6 +15,7 @@
>  #include "mock.h"
>  
>  static int interleave_arithmetic;
> +static bool extended_linear_cache;
>  
>  #define FAKE_QTG_ID	42
>  
> @@ -429,6 +430,24 @@ static struct cxl_mock_res *alloc_mock_res(resource_size_t size, int align)
>  	return res;
>  }
>  
> +/*
> + * Only update CFMWS0 as this is used by the auto region.
> + */
> +static void cfmws_elc_update(struct acpi_cedt_cfmws *window, int index)
> +{
> +	if (!extended_linear_cache)
> +		return;
> +
> +	if (index != 0)
> +		return;
> +
> +	/*
> +	 * The window size should be 2x of the CXL region size where half is
> +	 * DRAM and half is CXL
> +	 */
> +	window->window_size = mock_auto_region_size * 2;
> +}
> +
>  static int populate_cedt(void)
>  {
>  	struct cxl_mock_res *res;
> @@ -453,6 +472,7 @@ static int populate_cedt(void)
>  	for (i = cfmws_start; i <= cfmws_end; i++) {
>  		struct acpi_cedt_cfmws *window = mock_cfmws[i];
>  
> +		cfmws_elc_update(window, i);
>  		res = alloc_mock_res(window->window_size, SZ_256M);
>  		if (!res)
>  			return -ENOMEM;
> @@ -783,6 +803,8 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
>  	}
>  
>  	base = window->base_hpa;
> +	if (extended_linear_cache)
> +		base += mock_auto_region_size;
>  	cxld->hpa_range = (struct range) {
>  		.start = base,
>  		.end = base + mock_auto_region_size - 1,
> @@ -1609,6 +1631,8 @@ static __exit void cxl_test_exit(void)
>  
>  module_param(interleave_arithmetic, int, 0444);
>  MODULE_PARM_DESC(interleave_arithmetic, "Modulo:0, XOR:1");
> +module_param(extended_linear_cache, bool, 0444);
> +MODULE_PARM_DESC(extended_linear_cache, "Enable extended linear cache support");
>  module_init(cxl_test_init);
>  module_exit(cxl_test_exit);
>  MODULE_LICENSE("GPL v2");
> -- 
> 2.51.1
> 
> 
> 

[PATCH v2 3/3] cxl/test: Add support for acpi extended linear cache

[Dave Jiang]

Add the mock wrappers for hmat_get_extended_linear_cache_size() in order
to emulate the ACPI helper function for the regions that are mock'd by
cxl_test.

Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---
v2:
- Changed to use mock_auto_region_size
---
 tools/testing/cxl/Kbuild      |  1 +
 tools/testing/cxl/test/cxl.c  | 21 +++++++++++++++++++++
 tools/testing/cxl/test/mock.c | 20 ++++++++++++++++++++
 tools/testing/cxl/test/mock.h |  3 +++
 4 files changed, 45 insertions(+)

diff --git a/tools/testing/cxl/Kbuild b/tools/testing/cxl/Kbuild
index 0d5ce4b74b9f..65e9ac227aee 100644
--- a/tools/testing/cxl/Kbuild
+++ b/tools/testing/cxl/Kbuild
@@ -11,6 +11,7 @@ ldflags-y += --wrap=cxl_rcd_component_reg_phys
 ldflags-y += --wrap=cxl_endpoint_parse_cdat
 ldflags-y += --wrap=cxl_dport_init_ras_reporting
 ldflags-y += --wrap=devm_cxl_endpoint_decoders_setup
+ldflags-y += --wrap=hmat_get_extended_linear_cache_size
 
 DRIVERS := ../../../drivers
 CXL_SRC := $(DRIVERS)/cxl
diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c
index 2c3979c0b505..0c14e060a0cc 100644
--- a/tools/testing/cxl/test/cxl.c
+++ b/tools/testing/cxl/test/cxl.c
@@ -614,6 +614,25 @@ mock_acpi_evaluate_integer(acpi_handle handle, acpi_string pathname,
 	return AE_OK;
 }
 
+static int
+mock_hmat_get_extended_linear_cache_size(struct resource *backing_res,
+					 int nid, resource_size_t *cache_size)
+{
+	struct acpi_cedt_cfmws *window = mock_cfmws[0];
+	struct resource cfmws0_res =
+		DEFINE_RES_MEM(window->base_hpa, window->window_size);
+
+	if (!extended_linear_cache ||
+	    !resource_contains(&cfmws0_res, backing_res)) {
+		return hmat_get_extended_linear_cache_size(backing_res,
+							   nid, cache_size);
+	}
+
+	*cache_size = mock_auto_region_size;
+
+	return 0;
+}
+
 static struct pci_bus mock_pci_bus[NR_BRIDGES];
 static struct acpi_pci_root mock_pci_root[ARRAY_SIZE(mock_pci_bus)] = {
 	[0] = {
@@ -1142,6 +1161,8 @@ static struct cxl_mock_ops cxl_mock_ops = {
 	.devm_cxl_port_enumerate_dports = mock_cxl_port_enumerate_dports,
 	.cxl_endpoint_parse_cdat = mock_cxl_endpoint_parse_cdat,
 	.devm_cxl_add_dport_by_dev = mock_cxl_add_dport_by_dev,
+	.hmat_get_extended_linear_cache_size =
+		mock_hmat_get_extended_linear_cache_size,
 	.list = LIST_HEAD_INIT(cxl_mock_ops.list),
 };
 
diff --git a/tools/testing/cxl/test/mock.c b/tools/testing/cxl/test/mock.c
index 995269a75cbd..bff5853717f0 100644
--- a/tools/testing/cxl/test/mock.c
+++ b/tools/testing/cxl/test/mock.c
@@ -111,6 +111,26 @@ acpi_status __wrap_acpi_evaluate_integer(acpi_handle handle,
 }
 EXPORT_SYMBOL(__wrap_acpi_evaluate_integer);
 
+int __wrap_hmat_get_extended_linear_cache_size(struct resource *backing_res,
+					       int nid,
+					       resource_size_t *cache_size)
+{
+	int index, rc;
+	struct cxl_mock_ops *ops = get_cxl_mock_ops(&index);
+
+	if (ops)
+		rc = ops->hmat_get_extended_linear_cache_size(backing_res, nid,
+							      cache_size);
+	else
+		rc = hmat_get_extended_linear_cache_size(backing_res, nid,
+							 cache_size);
+
+	put_cxl_mock_ops(index);
+
+	return rc;
+}
+EXPORT_SYMBOL_GPL(__wrap_hmat_get_extended_linear_cache_size);
+
 struct acpi_pci_root *__wrap_acpi_pci_find_root(acpi_handle handle)
 {
 	int index;
diff --git a/tools/testing/cxl/test/mock.h b/tools/testing/cxl/test/mock.h
index 4ed932e76aae..bfd36cbdbae2 100644
--- a/tools/testing/cxl/test/mock.h
+++ b/tools/testing/cxl/test/mock.h
@@ -25,6 +25,9 @@ struct cxl_mock_ops {
 	void (*cxl_endpoint_parse_cdat)(struct cxl_port *port);
 	struct cxl_dport *(*devm_cxl_add_dport_by_dev)(struct cxl_port *port,
 						       struct device *dport_dev);
+	int (*hmat_get_extended_linear_cache_size)(struct resource *backing_res,
+						   int nid,
+						   resource_size_t *cache_size);
 };
 
 void register_cxl_mock_ops(struct cxl_mock_ops *ops);
-- 
2.51.1

Re: [PATCH v2 3/3] cxl/test: Add support for acpi extended linear cache

[Fabio M. De Francesco]

On Monday, November 17, 2025 3:46:11 PM Central European Standard Time Dave Jiang wrote:
> Add the mock wrappers for hmat_get_extended_linear_cache_size() in order
> to emulate the ACPI helper function for the regions that are mock'd by
> cxl_test.
> 
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> ---
> v2:
> - Changed to use mock_auto_region_size
> ---

Reviewed-by: Fabio M. De Francesco <fabio.m.de.francesco@linux.intel.com>

>  tools/testing/cxl/Kbuild      |  1 +
>  tools/testing/cxl/test/cxl.c  | 21 +++++++++++++++++++++
>  tools/testing/cxl/test/mock.c | 20 ++++++++++++++++++++
>  tools/testing/cxl/test/mock.h |  3 +++
>  4 files changed, 45 insertions(+)
> 
> diff --git a/tools/testing/cxl/Kbuild b/tools/testing/cxl/Kbuild
> index 0d5ce4b74b9f..65e9ac227aee 100644
> --- a/tools/testing/cxl/Kbuild
> +++ b/tools/testing/cxl/Kbuild
> @@ -11,6 +11,7 @@ ldflags-y += --wrap=cxl_rcd_component_reg_phys
>  ldflags-y += --wrap=cxl_endpoint_parse_cdat
>  ldflags-y += --wrap=cxl_dport_init_ras_reporting
>  ldflags-y += --wrap=devm_cxl_endpoint_decoders_setup
> +ldflags-y += --wrap=hmat_get_extended_linear_cache_size
>  
>  DRIVERS := ../../../drivers
>  CXL_SRC := $(DRIVERS)/cxl
> diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c
> index 2c3979c0b505..0c14e060a0cc 100644
> --- a/tools/testing/cxl/test/cxl.c
> +++ b/tools/testing/cxl/test/cxl.c
> @@ -614,6 +614,25 @@ mock_acpi_evaluate_integer(acpi_handle handle, acpi_string pathname,
>  	return AE_OK;
>  }
>  
> +static int
> +mock_hmat_get_extended_linear_cache_size(struct resource *backing_res,
> +					 int nid, resource_size_t *cache_size)
> +{
> +	struct acpi_cedt_cfmws *window = mock_cfmws[0];
> +	struct resource cfmws0_res =
> +		DEFINE_RES_MEM(window->base_hpa, window->window_size);
> +
> +	if (!extended_linear_cache ||
> +	    !resource_contains(&cfmws0_res, backing_res)) {
> +		return hmat_get_extended_linear_cache_size(backing_res,
> +							   nid, cache_size);
> +	}
> +
> +	*cache_size = mock_auto_region_size;
> +
> +	return 0;
> +}
> +
>  static struct pci_bus mock_pci_bus[NR_BRIDGES];
>  static struct acpi_pci_root mock_pci_root[ARRAY_SIZE(mock_pci_bus)] = {
>  	[0] = {
> @@ -1142,6 +1161,8 @@ static struct cxl_mock_ops cxl_mock_ops = {
>  	.devm_cxl_port_enumerate_dports = mock_cxl_port_enumerate_dports,
>  	.cxl_endpoint_parse_cdat = mock_cxl_endpoint_parse_cdat,
>  	.devm_cxl_add_dport_by_dev = mock_cxl_add_dport_by_dev,
> +	.hmat_get_extended_linear_cache_size =
> +		mock_hmat_get_extended_linear_cache_size,
>  	.list = LIST_HEAD_INIT(cxl_mock_ops.list),
>  };
>  
> diff --git a/tools/testing/cxl/test/mock.c b/tools/testing/cxl/test/mock.c
> index 995269a75cbd..bff5853717f0 100644
> --- a/tools/testing/cxl/test/mock.c
> +++ b/tools/testing/cxl/test/mock.c
> @@ -111,6 +111,26 @@ acpi_status __wrap_acpi_evaluate_integer(acpi_handle handle,
>  }
>  EXPORT_SYMBOL(__wrap_acpi_evaluate_integer);
>  
> +int __wrap_hmat_get_extended_linear_cache_size(struct resource *backing_res,
> +					       int nid,
> +					       resource_size_t *cache_size)
> +{
> +	int index, rc;
> +	struct cxl_mock_ops *ops = get_cxl_mock_ops(&index);
> +
> +	if (ops)
> +		rc = ops->hmat_get_extended_linear_cache_size(backing_res, nid,
> +							      cache_size);
> +	else
> +		rc = hmat_get_extended_linear_cache_size(backing_res, nid,
> +							 cache_size);
> +
> +	put_cxl_mock_ops(index);
> +
> +	return rc;
> +}
> +EXPORT_SYMBOL_GPL(__wrap_hmat_get_extended_linear_cache_size);
> +
>  struct acpi_pci_root *__wrap_acpi_pci_find_root(acpi_handle handle)
>  {
>  	int index;
> diff --git a/tools/testing/cxl/test/mock.h b/tools/testing/cxl/test/mock.h
> index 4ed932e76aae..bfd36cbdbae2 100644
> --- a/tools/testing/cxl/test/mock.h
> +++ b/tools/testing/cxl/test/mock.h
> @@ -25,6 +25,9 @@ struct cxl_mock_ops {
>  	void (*cxl_endpoint_parse_cdat)(struct cxl_port *port);
>  	struct cxl_dport *(*devm_cxl_add_dport_by_dev)(struct cxl_port *port,
>  						       struct device *dport_dev);
> +	int (*hmat_get_extended_linear_cache_size)(struct resource *backing_res,
> +						   int nid,
> +						   resource_size_t *cache_size);
>  };
>  
>  void register_cxl_mock_ops(struct cxl_mock_ops *ops);
> -- 
> 2.51.1
> 
> 
> 

Re: [PATCH v2 0/3] cxl/test: Add unit testing for extended linear cache

[Dave Jiang]

On 11/17/25 7:46 AM, Dave Jiang wrote:
> v2:
> - Use a global variable 'mock_auto_region_size' instead of a static define.
>   Expectation is LMH will change that value for its testing.
> 
> The series adds support for mocking of extended linear cache support
> in cxl_test. A module parameter is introduced to activate the mocking.
> Tests will be added to CXL CLI user tools for regression testing.
> 
> This series depends on the patch [1] that provides the extended linear
> cache size via sysfs.
> 
> [1]: https://lore.kernel.org/linux-cxl/20251022203052.4078527-1-dave.jiang@intel.com/
> 
> Dave Jiang (3):
>   cxl/test: Standardize CXL auto region size
>   cxl/test: Add cxl_test CFMWS support for extended linear cache
>   cxl/test: Add support for acpi extended linear cache
> 
>  tools/testing/cxl/Kbuild      |  1 +
>  tools/testing/cxl/test/cxl.c  | 56 ++++++++++++++++++++++++++++++++---
>  tools/testing/cxl/test/mock.c | 20 +++++++++++++
>  tools/testing/cxl/test/mock.h |  3 ++
>  4 files changed, 76 insertions(+), 4 deletions(-)
> 
> 
> base-commit: e9a6fb0bcdd7609be6969112f3fbfcce3b1d4a7c

applied to cxl/next
68f4a852e183 cxl/test: Add support for acpi extended linear cache
4b1c0466c8fb cxl/test: Add cxl_test CFMWS support for extended linear cache
fa59c35167af cxl/test: Standardize CXL auto region size