Re: [PATCH v4 3/6] hw/riscv/virt: Advertise the CXL host bridge to firmware via extra-pci-roots

[Chen Pei <cp0613@linux.alibaba.com>]

Hi Junjie,

Thanks a lot for the review and for testing this end to end!

> One optional thing about placement: select PXB in 1/6 also brings
> plain pxb-pcie to riscv virt, and that one needs the same fw_cfg file
> with cxl=off -- as posted, a pxb-pcie with cxl=off is never populated
> by the firmware. arm/virt, pc and hppa make the call unconditionally,
> and the generator returns nothing without an expander root bus, so it
> can sit outside the cxl block. Moved here: the pxb-pcie case
> enumerates with cxl=off and the four riscv64 ACPI cases still pass.
> Here or as a follow-up, your call.

Good catch -- thanks for the heads-up.  Since 1/6 selects PXB, plain
pxb-pcie is indeed left unadvertised to firmware with cxl=off as
posted.  I will move pci_bus_add_fw_cfg_extra_pci_roots() out of the
cxl block in v5, in line with arm/virt, pc and hppa.

Thanks again,
Pei