From: Dave Jiang <dave.jiang@intel.com>
To: sashiko-reviews@lists.linux.dev
Cc: linux-cxl@vger.kernel.org
Subject: Re: [PATCH v4 12/13] ACPI: APEI: GHES: Bound AER info copy and sanitize software metadata
Date: Mon, 24 Aug 2026 14:32:52 -0700 [thread overview]
Message-ID: <3189ffc8-d3a5-44e4-9301-4c98189cbab0@intel.com> (raw)
In-Reply-To: <20260824181753.F3F681F000E9@smtp.kernel.org>
On 8/24/26 11:17 AM, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 6 potential issue(s) to consider:
>
> New issues:
> - [High] Hardcoding `header_len = 0` and `flit = false` in `ghes_handle_aer()` actively breaks the parsing and printing of legitimate Flit mode TLP logs from CPER AER records.
>
> Pre-existing issues:
> - [High] Memory allocated for `aer_capability_regs` from the fixed-size `ghes_estatus_pool` is permanently leaked when `aer_recover_queue()` fails to insert into the `aer_recover_ring`.
> - [High] Memory allocated for `aer_capability_regs` is leaked in `aer_recover_work_func()` when the target PCI device cannot be found.
> - [High] Direct `memcpy` of raw CPER AER hardware bytes into `struct aer_capability_regs` misaligns fields, causing hardware registers to be incorrectly parsed and printed as TLP Prefix Logs.
> - [High] Uninitialized and unvalidated software-only fields in `cxl_rch_get_aer_info()` lead to a massive out-of-bounds kernel stack read in `pcie_print_tlp_log()`.
> - [High] Direct `memcpy` of little-endian CPER AER info into native integer fields of `struct aer_capability_regs` corrupts values on big-endian architectures.
> --
>
> --- Patch [12]: [PATCH v4 12/13] ACPI: APEI: GHES: Bound AER info copy and sanitize software metadata ---
> commit 91c35473296c2f22c740c76f30c6c146671ec39a
> Author: Dave Jiang <dave.jiang@intel.com>
>
> ACPI: APEI: GHES: Bound AER info copy and sanitize software metadata
>
> ghes_handle_aer() copies sizeof(struct aer_capability_regs) out of the
> fixed 96-byte pcie_err->aer_info. The struct is larger, so the copy reads
> past the section. Validate error_data_length, zero the destination,
> bound the copy to the 96-byte source, and clear header_len and flit.
>
> Closes: https://sashiko.dev/#/patchset/20260714231835.303081-1-dave.jiang@intel.com?part=3
>
>> diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c
>> index 0cc1e63836356..d6643127a2df0 100644
>> --- a/drivers/acpi/apei/ghes.c
>> +++ b/drivers/acpi/apei/ghes.c
>
> [ ... ]
>
>> @@ -664,13 +667,22 @@ static void ghes_handle_aer(struct acpi_hest_generic_data *gdata)
>> sizeof(struct aer_capability_regs));
>> if (!aer_info)
>> return;
>> - memcpy(aer_info, pcie_err->aer_info, sizeof(struct aer_capability_regs));
>> +
>> + /*
>> + * The CPER source is a fixed 96 bytes, shorter than struct
>> + * aer_capability_regs, so bound the copy to it. header_len and
>> + * flit are software-only and land inside those 96 bytes; clear
>> + * them so firmware cannot drive the pcie_print_tlp_log() loop
>> + * over dw[] out of bounds.
>> + */
>> + memset(aer_info, 0, sizeof(struct aer_capability_regs));
>> + memcpy(aer_info, pcie_err->aer_info, sizeof(pcie_err->aer_info));
>
> [Severity: High]
> This isn't a bug introduced by this patch, but does this direct memcpy
> misalign fields in struct aer_capability_regs?
>
> The CPER hardware payload expects Root Error Command and Root Error Status
> at offset 44 and 48 respectively. However, struct aer_capability_regs
> embeds the software struct pcie_tlp_log at offset 28.
>
> Because pcie_tlp_log is padded for Flit mode and takes up ~60 bytes, doesn't
> this incorrectly place the hardware's Root Error Command into
> aer_info->header_log.dw[4], which aliases to prefix[0]?
>
> This would cause pcie_print_tlp_log() to dump entirely unrelated hardware
> registers as TLP Prefix logs.
>
> [Severity: High]
> This is another pre-existing issue, but does this direct copy of little-endian
> CPER AER info into native integer fields corrupt the values on big-endian
> architectures?
>
> Without le32_to_cpu() conversions, parsing these fields on a big-endian
> system will interpret the bytes in reverse order, breaking downstream
> bitwise evaluations.
>
>> + aer_info->header_log.header_len = 0;
>> + aer_info->header_log.flit = false;
>
> [Severity: High]
> Does hardcoding header_len and flit to 0 and false unconditionally break the
> parsing and printing of legitimate Flit mode TLP logs from CPER AER records?
>
> If the hardware actually experienced an error in Flit mode, indicated by
> PCI_ERR_CAP_TLP_LOG_FLIT in aer_info->cap_control, this forcibly discards
> that state. Won't pcie_print_tlp_log() then ignore the extended Flit mode
> header DWORDS entirely?
It will, but there is nothing to discard. Flit mode logs are not decoded on this path today, and this patch does not change that. What it changes is that the failure stops being an out of bounds read.
DJ
>
>>
>> aer_recover_queue(pcie_err->device_id.segment,
>> pcie_err->device_id.bus,
>> - devfn, aer_severity,
>> - (struct aer_capability_regs *)
>> - aer_info);
>> + devfn, aer_severity, aer_info);
>> }
>> #endif
>> }
>
> [Severity: High]
> This is a pre-existing issue, but does this code leak the memory allocated
> for aer_info from the fixed-size ghes_estatus_pool if aer_recover_queue()
> fails to insert into the aer_recover_ring?
>
> drivers/pci/pcie/aer.c:aer_recover_queue() {
> ...
> if (kfifo_in_spinlocked(&aer_recover_ring, &entry, 1,
> &aer_recover_ring_lock))
> schedule_work(&aer_recover_work);
> else
> pr_err("buffer overflow in recovery for ...\n", ...);
> }
>
> Since aer_recover_queue() returns void, ghes_handle_aer() cannot detect
> the failure to perform cleanup, permanently leaking the pool memory.
>
> [Severity: High]
> This is also a pre-existing issue, but is the memory for aer_info leaked
> in aer_recover_work_func() if the target PCI device cannot be found?
>
> drivers/pci/pcie/aer.c:aer_recover_work_func() {
> ...
> pdev = pci_get_domain_bus_and_slot(entry.domain, entry.bus,
> entry.devfn);
> if (!pdev) {
> pr_err_ratelimited("... no pci_dev found\n");
> continue;
> }
> ...
> }
>
> The continue statement skips the ghes_estatus_pool_region_free() cleanup
> call at the bottom of the loop, permanently leaking the memory.
>
> [Severity: High]
> This isn't a bug in this patch either, but does a similar issue with
> uninitialized software-only fields exist in cxl_rch_get_aer_info()?
>
> drivers/cxl/core/ras_rch.c:cxl_rch_get_aer_info() {
> ...
> for (n = 0; n < read_cnt; n++)
> aer_regs_buf[n] = readl(aer_base + n * sizeof(u32));
> ...
> }
>
> If it reads from unimplemented MMIO space, it returns 0xFFFFFFFF, which
> populates the software-only metadata fields on the stack such that flit
> evaluates to true and header_len becomes 255.
>
> Doesn't this lead to an out-of-bounds stack read later?
>
> drivers/pci/pcie/tlp.c:pcie_print_tlp_log() {
> ...
> for (i = PCIE_STD_NUM_TLP_HEADERLOG; i < log->header_len; i++) {
> len += scnprintf(buf + len, sizeof(buf) - len,
> " %#010x", log->dw[i]);
> ...
> }
>
next prev parent reply other threads:[~2026-08-24 21:32 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-24 17:49 [PATCH v4 00/13] ACPI: APEI: GHES: Collection of fixes for issues reported by sashiko Dave Jiang
2026-08-24 17:49 ` [PATCH v4 01/13] efi/cper: Reject CPER records with an out-of-range error_data_length Dave Jiang
2026-08-24 18:10 ` sashiko-bot
2026-08-24 21:57 ` Jonathan Cameron
2026-08-25 16:31 ` Dave Jiang
2026-08-24 17:49 ` [PATCH v4 02/13] efi/cper: Reject an error status block length that wraps a u32 Dave Jiang
2026-08-24 18:03 ` sashiko-bot
2026-08-24 22:22 ` Jonathan Cameron
2026-08-24 17:49 ` [PATCH v4 03/13] ACPI: extlog: Validate elog record length before walking sections Dave Jiang
2026-08-24 18:07 ` sashiko-bot
2026-08-24 22:28 ` Jonathan Cameron
2026-08-25 17:15 ` Dave Jiang
2026-08-24 17:49 ` [PATCH v4 04/13] ACPI: extlog: Defer CXL protocol error handling to avoid lock inversion Dave Jiang
2026-08-24 18:03 ` sashiko-bot
2026-08-24 22:29 ` Jonathan Cameron
2026-08-24 17:49 ` [PATCH v4 05/13] ACPI: extlog: Avoid populating software AER metadata from raw hardware buffer Dave Jiang
2026-08-24 18:13 ` sashiko-bot
2026-08-24 23:05 ` Jonathan Cameron
2026-08-25 17:38 ` Dave Jiang
2026-08-24 17:49 ` [PATCH v4 06/13] ACPI: extlog: Validate PCIe error section length before payload access Dave Jiang
2026-08-24 18:07 ` sashiko-bot
2026-08-24 23:08 ` Jonathan Cameron
2026-08-24 17:49 ` [PATCH v4 07/13] ACPI: extlog: Fix CONFIG_ACPI_APEI_PCIEAER guard typo Dave Jiang
2026-08-24 18:15 ` sashiko-bot
2026-08-24 23:11 ` Jonathan Cameron
2026-08-24 17:49 ` [PATCH v4 08/13] ACPI: APEI: GHES: Bound CXL event record copy to the firmware section length Dave Jiang
2026-08-24 23:13 ` Jonathan Cameron
2026-08-24 17:49 ` [PATCH v4 09/13] ACPI: APEI: GHES: Validate CXL protocol error section length before RAS cap copy Dave Jiang
2026-08-24 18:10 ` sashiko-bot
2026-08-24 23:14 ` Jonathan Cameron
2026-08-24 17:49 ` [PATCH v4 10/13] efi/cper: Read only validated fields in cper_mem_err_pack() Dave Jiang
2026-08-24 18:08 ` sashiko-bot
2026-08-24 17:49 ` [PATCH v4 11/13] ACPI: APEI: GHES: Validate memory error section length before payload access Dave Jiang
2026-08-24 18:17 ` sashiko-bot
2026-08-24 17:49 ` [PATCH v4 12/13] ACPI: APEI: GHES: Bound AER info copy and sanitize software metadata Dave Jiang
2026-08-24 18:17 ` sashiko-bot
2026-08-24 21:32 ` Dave Jiang [this message]
2026-08-24 17:49 ` [PATCH v4 13/13] cxl/ras: Make cxl_cper_handle_prot_err() static Dave Jiang
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