From: Ira Weiny <ira.weiny@intel.com>
To: Dan Williams <dan.j.williams@intel.com>, <linux-cxl@vger.kernel.org>
Cc: Dave Jiang <dave.jiang@intel.com>,
Alejandro Lucero <alucerop@amd.com>,
Ira Weiny <ira.weiny@intel.com>
Subject: Re: [PATCH 3/4] cxl: Introduce 'struct cxl_dpa_partition' and 'struct cxl_range_info'
Date: Fri, 17 Jan 2025 14:42:53 -0600 [thread overview]
Message-ID: <678ac0cd60e0a_1f2d2b29481@iweiny-mobl.notmuch> (raw)
In-Reply-To: <173709424415.753996.10761098712604763500.stgit@dwillia2-xfh.jf.intel.com>
Dan Williams wrote:
[snip]
> diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
> index 7a85522294ad..7e1559b3ed88 100644
> --- a/drivers/cxl/core/hdm.c
> +++ b/drivers/cxl/core/hdm.c
> @@ -342,6 +342,75 @@ static int __cxl_dpa_reserve(struct cxl_endpoint_decoder *cxled,
> return 0;
> }
>
> +static int add_dpa_res(struct device *dev, struct resource *parent,
> + struct resource *res, resource_size_t start,
> + resource_size_t size, const char *type)
> +{
> + int rc;
> +
> + *res = (struct resource) {
> + .name = type,
> + .start = start,
> + .end = start + size - 1,
> + .flags = IORESOURCE_MEM,
> + };
> + if (resource_size(res) == 0) {
> + dev_dbg(dev, "DPA(%s): no capacity\n", res->name);
> + return 0;
> + }
> + rc = request_resource(parent, res);
> + if (rc) {
> + dev_err(dev, "DPA(%s): failed to track %pr (%d)\n", res->name,
> + res, rc);
> + return rc;
> + }
> +
> + dev_dbg(dev, "DPA(%s): %pr\n", res->name, res);
> +
> + return 0;
> +}
> +
> +/* if this fails the caller must destroy @cxlds, there is no recovery */
> +int cxl_dpa_setup(struct cxl_dev_state *cxlds, const struct cxl_dpa_info *info)
> +{
> + struct device *dev = cxlds->dev;
> +
> + guard(rwsem_write)(&cxl_dpa_rwsem);
> +
> + if (cxlds->nr_partitions)
> + return -EBUSY;
> +
> + if (!info->size || !info->nr_partitions) {
> + cxlds->dpa_res = DEFINE_RES_MEM(0, 0);
> + cxlds->nr_partitions = 0;
> + return 0;
> + }
> +
> + cxlds->dpa_res = DEFINE_RES_MEM(0, info->size);
> +
> + for (int i = 0; i < info->nr_partitions; i++) {
> + const char *desc;
> + int rc;
> +
> + if (i == CXL_PARTITION_RAM)
> + desc = "ram";
> + else if (i == CXL_PARTITION_PMEM)
> + desc = "pmem";
> + else
> + desc = "";
> + cxlds->part[i].perf.qos_class = CXL_QOS_CLASS_INVALID;
> + rc = add_dpa_res(dev, &cxlds->dpa_res, &cxlds->part[i].res,
> + info->range[i].start,
> + range_len(&info->range[i]), desc);
> + if (rc)
> + return rc;
> + cxlds->nr_partitions++;
> + }
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(cxl_dpa_setup);
Why put this in the middle of hdm.c where it splits up devm_cxl_dpa_reserve()
and __cxl_dpa_reserve()?
Ira
> +
> int devm_cxl_dpa_reserve(struct cxl_endpoint_decoder *cxled,
> resource_size_t base, resource_size_t len,
> resource_size_t skipped)
[snip]
next prev parent reply other threads:[~2025-01-17 20:43 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-17 6:10 [PATCH 0/4] cxl: DPA partition metadata is a mess Dan Williams
2025-01-17 6:10 ` [PATCH 1/4] cxl: Remove the CXL_DECODER_MIXED mistake Dan Williams
2025-01-17 10:03 ` Jonathan Cameron
2025-01-17 17:47 ` Dan Williams
2025-01-17 10:24 ` Alejandro Lucero Palau
2025-01-17 17:54 ` Dan Williams
2025-01-17 18:45 ` Ira Weiny
2025-01-17 6:10 ` [PATCH 2/4] cxl: Introduce to_{ram,pmem}_{res,perf}() helpers Dan Williams
2025-01-17 10:20 ` Jonathan Cameron
2025-01-17 10:23 ` Jonathan Cameron
2025-01-17 17:55 ` Dan Williams
2025-01-17 13:33 ` Alejandro Lucero Palau
2025-01-17 20:47 ` Dan Williams
2025-01-17 6:10 ` [PATCH 3/4] cxl: Introduce 'struct cxl_dpa_partition' and 'struct cxl_range_info' Dan Williams
2025-01-17 10:52 ` Jonathan Cameron
2025-01-17 13:38 ` Alejandro Lucero Palau
2025-01-17 18:23 ` Dan Williams
2025-01-17 20:32 ` Ira Weiny
2025-01-20 12:24 ` Alejandro Lucero Palau
2025-01-31 23:54 ` Dan Williams
2025-01-17 15:58 ` Alejandro Lucero Palau
2025-01-17 22:52 ` Dan Williams
2025-01-17 20:42 ` Ira Weiny [this message]
2025-01-17 22:08 ` Ira Weiny
2025-01-31 23:39 ` Dan Williams
2025-01-17 6:10 ` [PATCH 4/4] cxl: Make cxl_dpa_alloc() DPA partition number agnostic Dan Williams
2025-01-17 11:12 ` Jonathan Cameron
2025-01-17 18:37 ` Dan Williams
2025-01-17 15:42 ` Alejandro Lucero Palau
2025-01-17 20:57 ` Dan Williams
2025-01-20 12:39 ` Alejandro Lucero Palau
2025-02-01 0:08 ` Dan Williams
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