Re: [PATCH 4/4] cxl: Make cxl_dpa_alloc() DPA partition number agnostic

[Alejandro Lucero Palau <alucerop@amd.com>]

On 1/17/25 20:57, Dan Williams wrote:
> Alejandro Lucero Palau wrote:
>> On 1/17/25 06:10, Dan Williams wrote:
>>> cxl_dpa_alloc() is a hard coded nest of assumptions around PMEM
>>> allocations being distinct from RAM allocations in specific ways when in
>>> practice the allocation rules are only relative to DPA partition index.
>>>
>>> The rules for cxl_dpa_alloc() are:
>>>
>>> - allocations can only come from 1 partition
>>>
>>> - if allocating at partition-index-N, all free space in partitions less
>>>     than partition-index-N must be skipped over
>>
>> In my view, you are mixing the current code with the new code in this
>> explanation. It would be better to say the current code assumption is
>> just two partitions, ram and pmem, but DCD changes the game.
> There is no mixture in that description. The rules have not changed from
> old to new, the implementation is updated to reflect that the algorithm
> never needed to consider ram and pmem explicitly.


Well, if I'm not mistaken, until now we did not need to support an 
arbitrary number N of partitions but just 2.

In fact, your next sentence just confirms this.


<snip>


>
>> I think the problem here is we assumed ram and pmem being a child and
>> likely some free space, but a device with multiple HDM decoders implies
>> potentially several child.
>>
>> The code supported the case of multiple child but I guess we still had
>> in mind the simple case. Otherwise I can not understand all this ...
> Holes are not allowed. If you want to delete any decoder capacity you
> need to tear down all higher DPA allocations. That is a constraint of
> the hardware definition around how software can assume the value of
> DPABase. Will add some comments to that effect.


I have to admit I do not master the case of regions created from user 
space, but I thought the idea was to allow creation of regions from 
independent devices for facilitating interleaving and just adding 
flexibility when needing a memory region bigger than what only one 
device can offer at some specific time.


If so, I would expect cases like two different regions using different 
ranges inside a device DPA, and the two regions completely independent. 
If I understand your answer, this is possible but if you want to release 
one of those regions, you can not use the released DPA until the first 
one is also released ... my instinct tells me this can not be the case ...


If what I'm saying makes no sense, I'll try with a more complex 
description with a timeline and actions from user space, endpoint 
decoders, regions and so on, what will definitely helps me to 
(hopefully) understand the user space case.