Re: [RFC V2 05/10] hw/cxl: Wire UIO capability into HDM decoder and DVSEC registers

[Shrihari E S <shrihari.s@samsung.com>]

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On 30/08/26 03:21PM, Junjie Cao wrote:
>On the type list itself: 8.2.4.20.1 enumerates UIO Capable for CXL.mem
>devices, USPs and CXL Host Bridges, the Host Bridge case being the one
>that means "all the root ports within this Host Bridge are capable of
>routing UIO requests".  This sets it per root port instead, and
>pci_expander_bridge.c passes uio=false for CXL2_RC unconditionally, so
>the host bridge never advertises it.  On v1 I said a root port may well
>be intended, going off crp->uio_capable in the SVC wiring, but the
>enumeration above doesn't list one.  Is the root port the intended
>carrier?

Hi Junjie,

Thank you pointing this out. I agree that enabling UIO in Host Bridge
(HB) should enable UIO in all the root ports, but the challenge is that
the HB might not know which root port attached to it holds UIO PCIe capability.
That's why the implementation went to root port. Will extend this
capability field to HB (x-uio) in the next version of this patch.
CIIW, Root port is intended to hold the UIO dependent capablites
(SVC, 256b flit), so that eventhough the HB enables UIO HDM field,
the attached root ports can be checked for the PCIe capabilities before
enabling UIO in their respective HDM decoder.

Thanks and regards,
Shrihari

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