From: Robert Richter <rrichter@amd.com>
To: Dave Jiang <dave.jiang@intel.com>
Cc: linux-cxl@vger.kernel.org, dave@stgolabs.net,
jonathan.cameron@huawei.com, alison.schofield@intel.com,
vishal.l.verma@intel.com, ira.weiny@intel.com,
dan.j.williams@intel.com
Subject: Re: [PATCH v8 03/11] cxl: Add a cached copy of target_map to cxl_decoder
Date: Wed, 20 Aug 2025 16:17:55 +0200 [thread overview]
Message-ID: <aKXZEyG1PpPQ25dC@rric.localdomain> (raw)
In-Reply-To: <20250814222151.3520500-4-dave.jiang@intel.com>
On 14.08.25 15:21:43, Dave Jiang wrote:
> Add a cached copy of the hardware port-id list that is available at init
> before all @dport objects have been instantiated. Change is in preparation
> of delayed dport instantiation.
>
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Robert Richter <rrichter@amd.com>
Nice rework, thanks. A nitpick below.
-Robert
> @@ -984,7 +982,7 @@ static int cxl_setup_hdm_decoder_from_dvsec(
> }
>
> static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
> - int *target_map, void __iomem *hdm, int which,
> + void __iomem *hdm, int which,
> u64 *dpa_base, struct cxl_endpoint_dvsec_info *info)
Split line to fill the 80 char limit.
> {
> struct cxl_endpoint_decoder *cxled = NULL;
next prev parent reply other threads:[~2025-08-20 14:18 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-14 22:21 [PATCH v8 00/11] cxl: Delay HB port and switch dport probing until endpoint dev probe Dave Jiang
2025-08-14 22:21 ` [PATCH v8 01/11] cxl: Add helper to detect top of CXL device topology Dave Jiang
2025-08-15 12:50 ` Jonathan Cameron
2025-08-20 13:51 ` Robert Richter
2025-08-14 22:21 ` [PATCH v8 02/11] cxl: Add helper to reap dport Dave Jiang
2025-08-20 14:10 ` Robert Richter
2025-08-20 20:54 ` Dave Jiang
2025-08-14 22:21 ` [PATCH v8 03/11] cxl: Add a cached copy of target_map to cxl_decoder Dave Jiang
2025-08-15 12:52 ` Jonathan Cameron
2025-08-20 14:17 ` Robert Richter [this message]
2025-08-14 22:21 ` [PATCH v8 04/11] cxl: Move port register setup to first dport appear Dave Jiang
2025-08-15 12:57 ` Jonathan Cameron
2025-08-21 11:57 ` Robert Richter
2025-08-22 10:37 ` Robert Richter
2025-08-14 22:21 ` [PATCH v8 05/11] cxl: Defer dport allocation for switch ports Dave Jiang
2025-08-20 12:41 ` Robert Richter
2025-08-20 15:20 ` Dave Jiang
2025-08-22 9:59 ` Robert Richter
2025-08-22 15:52 ` Dave Jiang
2025-08-26 7:51 ` Robert Richter
2025-08-27 17:05 ` Dave Jiang
2025-08-29 15:02 ` Robert Richter
2025-08-29 17:23 ` Dave Jiang
2025-09-01 14:48 ` Robert Richter
2025-09-02 15:58 ` Dave Jiang
2025-08-27 21:15 ` Dave Jiang
2025-09-01 17:29 ` Robert Richter
2025-09-02 15:40 ` Dave Jiang
2025-09-03 18:21 ` Dave Jiang
2025-08-27 21:37 ` Dave Jiang
2025-08-14 22:21 ` [PATCH v8 06/11] cxl/test: Add cxl_test support for cxl_port_get_possible_dports() Dave Jiang
2025-08-14 22:21 ` [PATCH v8 07/11] cxl/test: Add mock version of devm_cxl_add_dport_by_dev() Dave Jiang
2025-08-14 22:21 ` [PATCH v8 08/11] cxl/test: Add support to cxl_test for decoder enumeration mock functions Dave Jiang
2025-08-14 22:21 ` [PATCH v8 09/11] cxl/test: Setup target_map for cxl_test decoder initialization Dave Jiang
2025-08-15 13:04 ` Jonathan Cameron
2025-08-14 22:21 ` [PATCH v8 10/11] cxl: Change sslbis handler to only handle single dport Dave Jiang
2025-08-14 22:21 ` [PATCH v8 11/11] tools/testing/cxl: Add decoder save/restore support Dave Jiang
2025-08-15 13:15 ` Jonathan Cameron
2025-08-19 9:39 ` [PATCH v8 00/11] cxl: Delay HB port and switch dport probing until endpoint dev probe Robert Richter
2025-08-19 15:41 ` Dave Jiang
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