From: Gregory Price <gourry@gourry.net>
To: "Cheatham, Benjamin" <benjamin.cheatham@amd.com>
Cc: linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org,
kernel-team@meta.com, dave@stgolabs.net,
jonathan.cameron@huawei.com, dave.jiang@intel.com,
alison.schofield@intel.com, vishal.l.verma@intel.com,
ira.weiny@intel.com, dan.j.williams@intel.com
Subject: Re: [PATCH 4/6] cxl: add CONFIG_CXL_REGION_CTRL_AUTO_* build config options
Date: Mon, 12 Jan 2026 18:05:03 -0500 [thread overview]
Message-ID: <aWV-H_YbSrmgAZYd@gourry-fedora-PF4VCD3F> (raw)
In-Reply-To: <05591180-c299-42e1-b8a0-ddd74c5f2174@amd.com>
On Mon, Jan 12, 2026 at 03:10:55PM -0600, Cheatham, Benjamin wrote:
> On 1/12/2026 10:35 AM, Gregory Price wrote:
> > +choice
> > + prompt "CXL Region Auto Control Mode"
> > + depends on CXL_REGION
> > + default CXL_REGION_CTRL_AUTO_DAX
> > + help
> > + Select the default controller for CXL regions when ctrl mode is
> > + set to 'auto'. This determines how CXL memory regions are exposed
> > + to the system when no explicit control mode is specified.
> > +
> > +config CXL_REGION_CTRL_AUTO_DAX
>
> This should probably be renamed to CXL_REGION_CTRL_DAX since only DAX is mentioned.
>
> > + bool "DAX"
> > + help
> > + When a CXL region's control mode is 'auto', create a DAX region
> > + controller. This allows fine-grained control over the memory region
> > + through the DAX subsystem, and the region can later be converted to
> > + System RAM via daxctl.
> > +
> > + This is the default and recommended option for most use cases.
>
> If you remove the 'auto' mode earlier on, then you can just drop the first sentence here.
> I'd also add a note about when a DAX region can be failed to be created (i.e. BIOS already
> set up and onlined the memory).
>
I think I'm just going to drop this entirely, probably this was just too
ambitious trying to create an easy transition from dax to sysram for
auto regions.
The reality is BIOS-configured decoders "is NOT the way" (TM). If BIOS
configures it - it's DAX, otherwise the user gets a choice (or they can
tear it down and rebuild).
~Gregory
next prev parent reply other threads:[~2026-01-12 23:05 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20260113093758epcas5p10cc9749a657b8e4d32db75b8b973b67d@epcas5p1.samsung.com>
2026-01-12 16:35 ` [PATCH 0/6] CXL: Introduce memory controller abstraction and sysram controller Gregory Price
2026-01-12 16:35 ` [PATCH 1/6] drivers/cxl: add cxl_memctrl_mode and region->memctrl Gregory Price
2026-01-12 20:59 ` dan.j.williams
2026-01-12 22:25 ` Gregory Price
2026-01-13 18:00 ` Dave Jiang
2026-01-13 20:07 ` Gregory Price
2026-01-14 16:36 ` dan.j.williams
2026-01-12 21:10 ` Cheatham, Benjamin
2026-01-12 22:34 ` Gregory Price
2026-01-14 17:18 ` Jonathan Cameron
2026-01-14 18:25 ` Gregory Price
2026-01-14 18:36 ` Jonathan Cameron
2026-01-12 16:35 ` [PATCH 2/6] cxl: add sysram_region memory controller Gregory Price
2026-01-12 20:00 ` David Hildenbrand (Red Hat)
2026-01-12 22:43 ` Gregory Price
2026-01-12 21:10 ` dan.j.williams
2026-01-12 22:47 ` Gregory Price
2026-01-12 21:10 ` Cheatham, Benjamin
2026-01-12 22:55 ` Gregory Price
2026-01-13 22:34 ` Cheatham, Benjamin
2026-01-12 16:35 ` [PATCH 3/6] cxl/core/region: move pmem memctrl logic into memctrl/pmem_region Gregory Price
2026-01-12 21:10 ` Cheatham, Benjamin
2026-01-12 22:58 ` Gregory Price
2026-01-13 9:12 ` Neeraj Kumar
2026-01-12 16:35 ` [PATCH 4/6] cxl: add CONFIG_CXL_REGION_CTRL_AUTO_* build config options Gregory Price
2026-01-12 21:10 ` Cheatham, Benjamin
2026-01-12 23:05 ` Gregory Price [this message]
2026-01-13 4:31 ` dan.j.williams
2026-01-13 13:55 ` Gregory Price
2026-01-12 16:35 ` [PATCH 5/6] cxl: add CXL_REGION_SYSRAM_DEFAULT_* build options Gregory Price
2026-01-12 21:11 ` Cheatham, Benjamin
2026-01-12 23:07 ` Gregory Price
2026-01-12 16:35 ` [PATCH 6/6] cxl/sysram: disallow onlining in ZONE_NORMAL if state is movable only Gregory Price
2026-01-12 21:11 ` Cheatham, Benjamin
2026-01-12 23:14 ` Gregory Price
2026-01-13 22:35 ` Cheatham, Benjamin
2026-01-13 9:37 ` [PATCH 0/6] CXL: Introduce memory controller abstraction and sysram controller Neeraj Kumar
2026-01-13 13:33 ` Gregory Price
2026-01-15 18:43 ` Alejandro Lucero Palau
2026-01-15 18:56 ` Gregory Price
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