* Re: [PATCH v4 0/3] Add CAMSS support for SM6350 [not found] <20260216-sm6350-camss-v4-0-b9df35f87edb@fairphone.com> @ 2026-03-30 22:49 ` Vladimir Zapolskiy 2026-04-03 8:09 ` Luca Weiss [not found] ` <20260216-sm6350-camss-v4-1-b9df35f87edb@fairphone.com> ` (3 subsequent siblings) 4 siblings, 1 reply; 15+ messages in thread From: Vladimir Zapolskiy @ 2026-03-30 22:49 UTC (permalink / raw) To: Luca Weiss Cc: Bryan O'Donoghue, Konrad Dybcio, Bryan O'Donoghue, Conor Dooley, Robert Foss, ~postmarketos/upstreaming, phone-devel, linux-arm-msm, linux-media, devicetree, linux-kernel, Krzysztof Kozlowski, Todor Tomov, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Bjorn Andersson Hi Luca, On 2/16/26 10:54, Luca Weiss wrote: > Add bindings, driver and dts to support the Camera Subsystem on the > SM6350 SoC. > > These patches were tested on a Fairphone 4 smartphone with WIP sensor > drivers (Sony IMX576 and IMX582), the camera pipeline works properly as > far as I can tell. > > Though when stopping the camera stream, the following clock warning > appears in dmesg. But it does not interfere with any functionality, > starting and stopping the stream works and debugcc is showing 426.4 MHz > while the clock is on, and 'off' while it's off. > > Any suggestion how to fix this, is appreciated. I've looked at CAMCC recently, and I do notice that SM6350 CAMCC does not set '.use_rpm = true' flag for whatever reason. If you find a free minute, can you test the change below?.. ----8<---- diff --git a/drivers/clk/qcom/camcc-sm6350.c b/drivers/clk/qcom/camcc-sm6350.c index 7df12c1311c6..ba880e4edcaf 100644 --- a/drivers/clk/qcom/camcc-sm6350.c +++ b/drivers/clk/qcom/camcc-sm6350.c @@ -1880,6 +1880,7 @@ static const struct qcom_cc_desc camcc_sm6350_desc = { .num_clks = ARRAY_SIZE(camcc_sm6350_clocks), .gdscs = camcc_sm6350_gdscs, .num_gdscs = ARRAY_SIZE(camcc_sm6350_gdscs), + .use_rpm = true, }; static const struct of_device_id camcc_sm6350_match_table[] = { ----8<---- This change could be considered to be included in any case, I believe. > [ 5738.590980] ------------[ cut here ]------------ > [ 5738.591009] gcc_camera_axi_clk status stuck at 'on' > [ 5738.591049] WARNING: CPU: 0 PID: 6918 at drivers/clk/qcom/clk-branch.c:87 clk_branch_toggle+0x170/0x190 > [ 5738.591081] Modules linked in: > [ 5738.591099] CPU: 0 UID: 10000 PID: 6918 Comm: plasma-camera Tainted: G W 6.17.0-00057-ge6b67db49622 #71 NONE > [ 5738.591118] Tainted: [W]=WARN > [ 5738.591126] Hardware name: Fairphone 4 (DT) > [ 5738.591136] pstate: 604000c5 (nZCv daIF +PAN -UAO -TCO -DIT -SSBS BTYPE=--) > [ 5738.591150] pc : clk_branch_toggle+0x170/0x190 > [ 5738.591164] lr : clk_branch_toggle+0x170/0x190 > [ 5738.591177] sp : ffff800086ed3980 > [ 5738.591184] x29: ffff800086ed3990 x28: 0000000000000001 x27: ffff800086ed3cd8 > [ 5738.591208] x26: 0000000000000000 x25: ffffda14fcfbd250 x24: 0000000000000000 > [ 5738.591230] x23: 0000000000000000 x22: ffffda14fc38bce0 x21: 0000000000000000 > [ 5738.591252] x20: ffffda14fd33e618 x19: 0000000000000000 x18: 00000000000064c8 > [ 5738.591274] x17: 0000000000000000 x16: 00001ae003667e9e x15: ffffda14fd2a07b0 > [ 5738.591295] x14: 0000000000000000 x13: 6f27207461206b63 x12: 7574732073757461 > [ 5738.591317] x11: 0000000000000058 x10: 0000000000000018 x9 : ffffda14fd2a0838 > [ 5738.591338] x8 : 0000000000057fa8 x7 : 0000000000000a16 x6 : ffffda14fd2f8838 > [ 5738.591360] x5 : ffff0001f6f59788 x4 : 0000000000000a15 x3 : ffff25ecf9d7e000 > [ 5738.591381] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff0000baf5c100 > [ 5738.591403] Call trace: > [ 5738.591412] clk_branch_toggle+0x170/0x190 (P) > [ 5738.591429] clk_branch2_disable+0x1c/0x30 > [ 5738.591445] clk_core_disable+0x5c/0xb4 > [ 5738.591462] clk_disable+0x38/0x60 > [ 5738.591478] camss_disable_clocks+0x44/0x78 > [ 5738.591496] vfe_put+0x7c/0xc0 > [ 5738.591512] vfe_set_power+0x40/0x50 > [ 5738.591528] pipeline_pm_power_one+0x14c/0x150 > [ 5738.591546] pipeline_pm_power+0x74/0xf4 > [ 5738.591561] v4l2_pipeline_pm_use+0x54/0x9c > [ 5738.591577] v4l2_pipeline_pm_put+0x14/0x40 > [ 5738.591592] video_unprepare_streaming+0x18/0x24 > [ 5738.591608] __vb2_queue_cancel+0x4c/0x314 > [ 5738.591626] vb2_core_streamoff+0x24/0xc8 > [ 5738.591643] vb2_ioctl_streamoff+0x58/0x98 > [ 5738.591657] v4l_streamoff+0x24/0x30 > [ 5738.591672] __video_do_ioctl+0x430/0x4a8 > [ 5738.591689] video_usercopy+0x2ac/0x680 > [ 5738.591705] video_ioctl2+0x18/0x40 > [ 5738.591720] v4l2_ioctl+0x40/0x60 > [ 5738.591734] __arm64_sys_ioctl+0x90/0xf0 > [ 5738.591750] invoke_syscall.constprop.0+0x40/0xf0 > [ 5738.591769] el0_svc_common.constprop.0+0x38/0xd8 > [ 5738.591785] do_el0_svc+0x1c/0x28 > [ 5738.591801] el0_svc+0x34/0xe8 > [ 5738.591820] el0t_64_sync_handler+0xa0/0xe4 > [ 5738.591838] el0t_64_sync+0x198/0x19c > [ 5738.591854] ---[ end trace 0000000000000000 ]--- > > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> > --- > Changes in v4: > - Update power-domain-names order (Krzysztof) > - Make hex numbers lower case in init seq (David) > - Pick up tags > - Link to v3: https://lore.kernel.org/r/20260213-sm6350-camss-v3-0-30a845b0b7cc@fairphone.com Should find some time myself to issue RBs, sorry for the delay. > Changes in v3: > - Update dt-bindings to include everything related to camss > - Update regulator names > - Remove slow_ahb_src > - Link to v2: https://lore.kernel.org/r/20251114-sm6350-camss-v2-0-d1ff67da33b6@fairphone.com > > Changes in v2: > - Remove prefix from interconnect-names > - Move 'top' power-domain to the top of list > - Update regulator supply names > - Link to v1: https://lore.kernel.org/r/20251024-sm6350-camss-v1-0-63d626638add@fairphone.com > > --- > Luca Weiss (3): > dt-bindings: media: camss: Add qcom,sm6350-camss > media: qcom: camss: Add SM6350 support > arm64: dts: qcom: sm6350: Add CAMSS node > > .../bindings/media/qcom,sm6350-camss.yaml | 471 +++++++++++++++++++++ > arch/arm64/boot/dts/qcom/sm6350.dtsi | 233 ++++++++++ > .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 125 ++++++ > drivers/media/platform/qcom/camss/camss-vfe.c | 2 + > drivers/media/platform/qcom/camss/camss.c | 261 ++++++++++++ > drivers/media/platform/qcom/camss/camss.h | 1 + > 6 files changed, 1093 insertions(+) > --- > base-commit: 3daf23347bb5f4a375d0101ed29c97ce1a99721b > change-id: 20251024-sm6350-camss-9c404bf9cfdd > > Best regards, -- Best wishes, Vladimir ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v4 0/3] Add CAMSS support for SM6350 2026-03-30 22:49 ` [PATCH v4 0/3] Add CAMSS support for SM6350 Vladimir Zapolskiy @ 2026-04-03 8:09 ` Luca Weiss 2026-04-03 10:09 ` Vladimir Zapolskiy 2026-04-03 15:07 ` Bryan O'Donoghue 0 siblings, 2 replies; 15+ messages in thread From: Luca Weiss @ 2026-04-03 8:09 UTC (permalink / raw) To: Vladimir Zapolskiy, Luca Weiss Cc: Bryan O'Donoghue, Konrad Dybcio, Bryan O'Donoghue, Conor Dooley, Robert Foss, ~postmarketos/upstreaming, phone-devel, linux-arm-msm, linux-media, devicetree, linux-kernel, Krzysztof Kozlowski, Todor Tomov, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Bjorn Andersson Hi Vladimir, On Tue Mar 31, 2026 at 12:49 AM CEST, Vladimir Zapolskiy wrote: > Hi Luca, > > On 2/16/26 10:54, Luca Weiss wrote: >> Add bindings, driver and dts to support the Camera Subsystem on the >> SM6350 SoC. >> >> These patches were tested on a Fairphone 4 smartphone with WIP sensor >> drivers (Sony IMX576 and IMX582), the camera pipeline works properly as >> far as I can tell. >> >> Though when stopping the camera stream, the following clock warning >> appears in dmesg. But it does not interfere with any functionality, >> starting and stopping the stream works and debugcc is showing 426.4 MHz >> while the clock is on, and 'off' while it's off. >> >> Any suggestion how to fix this, is appreciated. > > I've looked at CAMCC recently, and I do notice that SM6350 CAMCC does not > set '.use_rpm = true' flag for whatever reason. > > If you find a free minute, can you test the change below?.. Unfortunately that change does not resolve the "gcc_camera_axi_clk status stuck at 'on'" warning. fairphone-fp4:~$ cat /sys/bus/platform/drivers/sm6350-camcc/ad00000.clock-controller/power/runtime_status active fairphone-fp4:~$ cat /sys/bus/platform/drivers/sm6350-camcc/ad00000.clock-controller/power/runtime_status suspended > > ----8<---- > diff --git a/drivers/clk/qcom/camcc-sm6350.c b/drivers/clk/qcom/camcc-sm6350.c > index 7df12c1311c6..ba880e4edcaf 100644 > --- a/drivers/clk/qcom/camcc-sm6350.c > +++ b/drivers/clk/qcom/camcc-sm6350.c > @@ -1880,6 +1880,7 @@ static const struct qcom_cc_desc camcc_sm6350_desc = { > .num_clks = ARRAY_SIZE(camcc_sm6350_clocks), > .gdscs = camcc_sm6350_gdscs, > .num_gdscs = ARRAY_SIZE(camcc_sm6350_gdscs), > + .use_rpm = true, > }; > > static const struct of_device_id camcc_sm6350_match_table[] = { > ----8<---- > > This change could be considered to be included in any case, I believe. I guess this change is now the way to enable pm_runtime, I had this series 3 years ago in February 2023: https://lore.kernel.org/linux-arm-msm/20230213-sm6350-camcc-runtime_pm-v3-0-d35e0d833cc4@fairphone.com/ But I never followed up due to me not understanding pm_runtime well and no direct need for it. But I guess reviving that with use_rpm = true, add power-domains & required-opps to dt-bindings and sm6350.dtsi should be a good idea? Regards Luca > >> [ 5738.590980] ------------[ cut here ]------------ >> [ 5738.591009] gcc_camera_axi_clk status stuck at 'on' >> [ 5738.591049] WARNING: CPU: 0 PID: 6918 at drivers/clk/qcom/clk-branch.c:87 clk_branch_toggle+0x170/0x190 >> [ 5738.591081] Modules linked in: >> [ 5738.591099] CPU: 0 UID: 10000 PID: 6918 Comm: plasma-camera Tainted: G W 6.17.0-00057-ge6b67db49622 #71 NONE >> [ 5738.591118] Tainted: [W]=WARN >> [ 5738.591126] Hardware name: Fairphone 4 (DT) >> [ 5738.591136] pstate: 604000c5 (nZCv daIF +PAN -UAO -TCO -DIT -SSBS BTYPE=--) >> [ 5738.591150] pc : clk_branch_toggle+0x170/0x190 >> [ 5738.591164] lr : clk_branch_toggle+0x170/0x190 >> [ 5738.591177] sp : ffff800086ed3980 >> [ 5738.591184] x29: ffff800086ed3990 x28: 0000000000000001 x27: ffff800086ed3cd8 >> [ 5738.591208] x26: 0000000000000000 x25: ffffda14fcfbd250 x24: 0000000000000000 >> [ 5738.591230] x23: 0000000000000000 x22: ffffda14fc38bce0 x21: 0000000000000000 >> [ 5738.591252] x20: ffffda14fd33e618 x19: 0000000000000000 x18: 00000000000064c8 >> [ 5738.591274] x17: 0000000000000000 x16: 00001ae003667e9e x15: ffffda14fd2a07b0 >> [ 5738.591295] x14: 0000000000000000 x13: 6f27207461206b63 x12: 7574732073757461 >> [ 5738.591317] x11: 0000000000000058 x10: 0000000000000018 x9 : ffffda14fd2a0838 >> [ 5738.591338] x8 : 0000000000057fa8 x7 : 0000000000000a16 x6 : ffffda14fd2f8838 >> [ 5738.591360] x5 : ffff0001f6f59788 x4 : 0000000000000a15 x3 : ffff25ecf9d7e000 >> [ 5738.591381] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff0000baf5c100 >> [ 5738.591403] Call trace: >> [ 5738.591412] clk_branch_toggle+0x170/0x190 (P) >> [ 5738.591429] clk_branch2_disable+0x1c/0x30 >> [ 5738.591445] clk_core_disable+0x5c/0xb4 >> [ 5738.591462] clk_disable+0x38/0x60 >> [ 5738.591478] camss_disable_clocks+0x44/0x78 >> [ 5738.591496] vfe_put+0x7c/0xc0 >> [ 5738.591512] vfe_set_power+0x40/0x50 >> [ 5738.591528] pipeline_pm_power_one+0x14c/0x150 >> [ 5738.591546] pipeline_pm_power+0x74/0xf4 >> [ 5738.591561] v4l2_pipeline_pm_use+0x54/0x9c >> [ 5738.591577] v4l2_pipeline_pm_put+0x14/0x40 >> [ 5738.591592] video_unprepare_streaming+0x18/0x24 >> [ 5738.591608] __vb2_queue_cancel+0x4c/0x314 >> [ 5738.591626] vb2_core_streamoff+0x24/0xc8 >> [ 5738.591643] vb2_ioctl_streamoff+0x58/0x98 >> [ 5738.591657] v4l_streamoff+0x24/0x30 >> [ 5738.591672] __video_do_ioctl+0x430/0x4a8 >> [ 5738.591689] video_usercopy+0x2ac/0x680 >> [ 5738.591705] video_ioctl2+0x18/0x40 >> [ 5738.591720] v4l2_ioctl+0x40/0x60 >> [ 5738.591734] __arm64_sys_ioctl+0x90/0xf0 >> [ 5738.591750] invoke_syscall.constprop.0+0x40/0xf0 >> [ 5738.591769] el0_svc_common.constprop.0+0x38/0xd8 >> [ 5738.591785] do_el0_svc+0x1c/0x28 >> [ 5738.591801] el0_svc+0x34/0xe8 >> [ 5738.591820] el0t_64_sync_handler+0xa0/0xe4 >> [ 5738.591838] el0t_64_sync+0x198/0x19c >> [ 5738.591854] ---[ end trace 0000000000000000 ]--- >> >> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> >> --- >> Changes in v4: >> - Update power-domain-names order (Krzysztof) >> - Make hex numbers lower case in init seq (David) >> - Pick up tags >> - Link to v3: https://lore.kernel.org/r/20260213-sm6350-camss-v3-0-30a845b0b7cc@fairphone.com > > Should find some time myself to issue RBs, sorry for the delay. > >> Changes in v3: >> - Update dt-bindings to include everything related to camss >> - Update regulator names >> - Remove slow_ahb_src >> - Link to v2: https://lore.kernel.org/r/20251114-sm6350-camss-v2-0-d1ff67da33b6@fairphone.com >> >> Changes in v2: >> - Remove prefix from interconnect-names >> - Move 'top' power-domain to the top of list >> - Update regulator supply names >> - Link to v1: https://lore.kernel.org/r/20251024-sm6350-camss-v1-0-63d626638add@fairphone.com >> >> --- >> Luca Weiss (3): >> dt-bindings: media: camss: Add qcom,sm6350-camss >> media: qcom: camss: Add SM6350 support >> arm64: dts: qcom: sm6350: Add CAMSS node >> >> .../bindings/media/qcom,sm6350-camss.yaml | 471 +++++++++++++++++++++ >> arch/arm64/boot/dts/qcom/sm6350.dtsi | 233 ++++++++++ >> .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 125 ++++++ >> drivers/media/platform/qcom/camss/camss-vfe.c | 2 + >> drivers/media/platform/qcom/camss/camss.c | 261 ++++++++++++ >> drivers/media/platform/qcom/camss/camss.h | 1 + >> 6 files changed, 1093 insertions(+) >> --- >> base-commit: 3daf23347bb5f4a375d0101ed29c97ce1a99721b >> change-id: 20251024-sm6350-camss-9c404bf9cfdd >> >> Best regards, ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v4 0/3] Add CAMSS support for SM6350 2026-04-03 8:09 ` Luca Weiss @ 2026-04-03 10:09 ` Vladimir Zapolskiy 2026-04-03 15:07 ` Bryan O'Donoghue 1 sibling, 0 replies; 15+ messages in thread From: Vladimir Zapolskiy @ 2026-04-03 10:09 UTC (permalink / raw) To: Luca Weiss Cc: Bryan O'Donoghue, Konrad Dybcio, Bryan O'Donoghue, Conor Dooley, Robert Foss, ~postmarketos/upstreaming, phone-devel, linux-arm-msm, linux-media, devicetree, linux-kernel, Krzysztof Kozlowski, Todor Tomov, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Bjorn Andersson Hi Luca. On 4/3/26 11:09, Luca Weiss wrote: > Hi Vladimir, > > On Tue Mar 31, 2026 at 12:49 AM CEST, Vladimir Zapolskiy wrote: >> Hi Luca, >> >> On 2/16/26 10:54, Luca Weiss wrote: >>> Add bindings, driver and dts to support the Camera Subsystem on the >>> SM6350 SoC. >>> >>> These patches were tested on a Fairphone 4 smartphone with WIP sensor >>> drivers (Sony IMX576 and IMX582), the camera pipeline works properly as >>> far as I can tell. >>> >>> Though when stopping the camera stream, the following clock warning >>> appears in dmesg. But it does not interfere with any functionality, >>> starting and stopping the stream works and debugcc is showing 426.4 MHz >>> while the clock is on, and 'off' while it's off. >>> >>> Any suggestion how to fix this, is appreciated. >> >> I've looked at CAMCC recently, and I do notice that SM6350 CAMCC does not >> set '.use_rpm = true' flag for whatever reason. >> >> If you find a free minute, can you test the change below?.. > > Unfortunately that change does not resolve the "gcc_camera_axi_clk > status stuck at 'on'" warning. > > fairphone-fp4:~$ cat /sys/bus/platform/drivers/sm6350-camcc/ad00000.clock-controller/power/runtime_status > active > > fairphone-fp4:~$ cat /sys/bus/platform/drivers/sm6350-camcc/ad00000.clock-controller/power/runtime_status > suspended > So it seems to be a technically deeper issue, once given insights by Imran likely to be very relevant: https://lore.kernel.org/linux-arm-msm/caa870e2-3795-40bc-9f0e-c93e313c8c6e@oss.qualcomm.com/ >> >> ----8<---- >> diff --git a/drivers/clk/qcom/camcc-sm6350.c b/drivers/clk/qcom/camcc-sm6350.c >> index 7df12c1311c6..ba880e4edcaf 100644 >> --- a/drivers/clk/qcom/camcc-sm6350.c >> +++ b/drivers/clk/qcom/camcc-sm6350.c >> @@ -1880,6 +1880,7 @@ static const struct qcom_cc_desc camcc_sm6350_desc = { >> .num_clks = ARRAY_SIZE(camcc_sm6350_clocks), >> .gdscs = camcc_sm6350_gdscs, >> .num_gdscs = ARRAY_SIZE(camcc_sm6350_gdscs), >> + .use_rpm = true, >> }; >> >> static const struct of_device_id camcc_sm6350_match_table[] = { >> ----8<---- >> >> This change could be considered to be included in any case, I believe. > > I guess this change is now the way to enable pm_runtime, I had this > series 3 years ago in February 2023: > https://lore.kernel.org/linux-arm-msm/20230213-sm6350-camcc-runtime_pm-v3-0-d35e0d833cc4@fairphone.com/ > > But I never followed up due to me not understanding pm_runtime well and > no direct need for it. > > But I guess reviving that with use_rpm = true, add power-domains & > required-opps to dt-bindings and sm6350.dtsi should be a good idea? > It should be, if SM6350 CAMCC is known to belong to an on-SoC power domain, then devm_pm_runtime_enable() will be called on .probe to embed the controller driver into the runtime PM framework, see commit c0b6627369bc. Power domain management of devices is handled inside the runtime PM. -- Best wishes, Vladimir ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v4 0/3] Add CAMSS support for SM6350 2026-04-03 8:09 ` Luca Weiss 2026-04-03 10:09 ` Vladimir Zapolskiy @ 2026-04-03 15:07 ` Bryan O'Donoghue 2026-05-01 10:12 ` Luca Weiss 1 sibling, 1 reply; 15+ messages in thread From: Bryan O'Donoghue @ 2026-04-03 15:07 UTC (permalink / raw) To: Luca Weiss, Vladimir Zapolskiy Cc: Konrad Dybcio, Bryan O'Donoghue, Conor Dooley, Robert Foss, ~postmarketos/upstreaming, phone-devel, linux-arm-msm, linux-media, devicetree, linux-kernel, Krzysztof Kozlowski, Todor Tomov, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Bjorn Andersson On 03/04/2026 09:09, Luca Weiss wrote: > Hi Vladimir, > > On Tue Mar 31, 2026 at 12:49 AM CEST, Vladimir Zapolskiy wrote: >> Hi Luca, >> >> On 2/16/26 10:54, Luca Weiss wrote: >>> Add bindings, driver and dts to support the Camera Subsystem on the >>> SM6350 SoC. >>> >>> These patches were tested on a Fairphone 4 smartphone with WIP sensor >>> drivers (Sony IMX576 and IMX582), the camera pipeline works properly as >>> far as I can tell. >>> >>> Though when stopping the camera stream, the following clock warning >>> appears in dmesg. But it does not interfere with any functionality, >>> starting and stopping the stream works and debugcc is showing 426.4 MHz >>> while the clock is on, and 'off' while it's off. >>> >>> Any suggestion how to fix this, is appreciated. >> >> I've looked at CAMCC recently, and I do notice that SM6350 CAMCC does not >> set '.use_rpm = true' flag for whatever reason. >> >> If you find a free minute, can you test the change below?.. > > Unfortunately that change does not resolve the "gcc_camera_axi_clk > status stuck at 'on'" warning. > > fairphone-fp4:~$ cat /sys/bus/platform/drivers/sm6350-camcc/ad00000.clock-controller/power/runtime_status > active > > fairphone-fp4:~$ cat /sys/bus/platform/drivers/sm6350-camcc/ad00000.clock-controller/power/runtime_status > suspended > >> >> ----8<---- >> diff --git a/drivers/clk/qcom/camcc-sm6350.c b/drivers/clk/qcom/camcc-sm6350.c >> index 7df12c1311c6..ba880e4edcaf 100644 >> --- a/drivers/clk/qcom/camcc-sm6350.c >> +++ b/drivers/clk/qcom/camcc-sm6350.c >> @@ -1880,6 +1880,7 @@ static const struct qcom_cc_desc camcc_sm6350_desc = { >> .num_clks = ARRAY_SIZE(camcc_sm6350_clocks), >> .gdscs = camcc_sm6350_gdscs, >> .num_gdscs = ARRAY_SIZE(camcc_sm6350_gdscs), >> + .use_rpm = true, >> }; >> >> static const struct of_device_id camcc_sm6350_match_table[] = { >> ----8<---- >> >> This change could be considered to be included in any case, I believe. > > I guess this change is now the way to enable pm_runtime, I had this > series 3 years ago in February 2023: > https://lore.kernel.org/linux-arm-msm/20230213-sm6350-camcc-runtime_pm-v3-0-d35e0d833cc4@fairphone.com/ > > But I never followed up due to me not understanding pm_runtime well and > no direct need for it. > > But I guess reviving that with use_rpm = true, add power-domains & > required-opps to dt-bindings and sm6350.dtsi should be a good idea? > > Regards > Luca > >> >>> [ 5738.590980] ------------[ cut here ]------------ >>> [ 5738.591009] gcc_camera_axi_clk status stuck at 'on' >>> [ 5738.591049] WARNING: CPU: 0 PID: 6918 at drivers/clk/qcom/clk-branch.c:87 clk_branch_toggle+0x170/0x190 >>> [ 5738.591081] Modules linked in: >>> [ 5738.591099] CPU: 0 UID: 10000 PID: 6918 Comm: plasma-camera Tainted: G W 6.17.0-00057-ge6b67db49622 #71 NONE >>> [ 5738.591118] Tainted: [W]=WARN >>> [ 5738.591126] Hardware name: Fairphone 4 (DT) >>> [ 5738.591136] pstate: 604000c5 (nZCv daIF +PAN -UAO -TCO -DIT -SSBS BTYPE=--) >>> [ 5738.591150] pc : clk_branch_toggle+0x170/0x190 >>> [ 5738.591164] lr : clk_branch_toggle+0x170/0x190 >>> [ 5738.591177] sp : ffff800086ed3980 >>> [ 5738.591184] x29: ffff800086ed3990 x28: 0000000000000001 x27: ffff800086ed3cd8 >>> [ 5738.591208] x26: 0000000000000000 x25: ffffda14fcfbd250 x24: 0000000000000000 >>> [ 5738.591230] x23: 0000000000000000 x22: ffffda14fc38bce0 x21: 0000000000000000 >>> [ 5738.591252] x20: ffffda14fd33e618 x19: 0000000000000000 x18: 00000000000064c8 >>> [ 5738.591274] x17: 0000000000000000 x16: 00001ae003667e9e x15: ffffda14fd2a07b0 >>> [ 5738.591295] x14: 0000000000000000 x13: 6f27207461206b63 x12: 7574732073757461 >>> [ 5738.591317] x11: 0000000000000058 x10: 0000000000000018 x9 : ffffda14fd2a0838 >>> [ 5738.591338] x8 : 0000000000057fa8 x7 : 0000000000000a16 x6 : ffffda14fd2f8838 >>> [ 5738.591360] x5 : ffff0001f6f59788 x4 : 0000000000000a15 x3 : ffff25ecf9d7e000 >>> [ 5738.591381] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff0000baf5c100 >>> [ 5738.591403] Call trace: >>> [ 5738.591412] clk_branch_toggle+0x170/0x190 (P) >>> [ 5738.591429] clk_branch2_disable+0x1c/0x30 >>> [ 5738.591445] clk_core_disable+0x5c/0xb4 >>> [ 5738.591462] clk_disable+0x38/0x60 >>> [ 5738.591478] camss_disable_clocks+0x44/0x78 >>> [ 5738.591496] vfe_put+0x7c/0xc0 >>> [ 5738.591512] vfe_set_power+0x40/0x50 >>> [ 5738.591528] pipeline_pm_power_one+0x14c/0x150 >>> [ 5738.591546] pipeline_pm_power+0x74/0xf4 >>> [ 5738.591561] v4l2_pipeline_pm_use+0x54/0x9c >>> [ 5738.591577] v4l2_pipeline_pm_put+0x14/0x40 >>> [ 5738.591592] video_unprepare_streaming+0x18/0x24 >>> [ 5738.591608] __vb2_queue_cancel+0x4c/0x314 >>> [ 5738.591626] vb2_core_streamoff+0x24/0xc8 >>> [ 5738.591643] vb2_ioctl_streamoff+0x58/0x98 >>> [ 5738.591657] v4l_streamoff+0x24/0x30 >>> [ 5738.591672] __video_do_ioctl+0x430/0x4a8 >>> [ 5738.591689] video_usercopy+0x2ac/0x680 >>> [ 5738.591705] video_ioctl2+0x18/0x40 >>> [ 5738.591720] v4l2_ioctl+0x40/0x60 >>> [ 5738.591734] __arm64_sys_ioctl+0x90/0xf0 >>> [ 5738.591750] invoke_syscall.constprop.0+0x40/0xf0 >>> [ 5738.591769] el0_svc_common.constprop.0+0x38/0xd8 >>> [ 5738.591785] do_el0_svc+0x1c/0x28 >>> [ 5738.591801] el0_svc+0x34/0xe8 >>> [ 5738.591820] el0t_64_sync_handler+0xa0/0xe4 >>> [ 5738.591838] el0t_64_sync+0x198/0x19c >>> [ 5738.591854] ---[ end trace 0000000000000000 ]--- >>> >>> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> >>> --- >>> Changes in v4: >>> - Update power-domain-names order (Krzysztof) >>> - Make hex numbers lower case in init seq (David) >>> - Pick up tags >>> - Link to v3: https://lore.kernel.org/r/20260213-sm6350-camss-v3-0-30a845b0b7cc@fairphone.com >> >> Should find some time myself to issue RBs, sorry for the delay. >> >>> Changes in v3: >>> - Update dt-bindings to include everything related to camss >>> - Update regulator names >>> - Remove slow_ahb_src >>> - Link to v2: https://lore.kernel.org/r/20251114-sm6350-camss-v2-0-d1ff67da33b6@fairphone.com >>> >>> Changes in v2: >>> - Remove prefix from interconnect-names >>> - Move 'top' power-domain to the top of list >>> - Update regulator supply names >>> - Link to v1: https://lore.kernel.org/r/20251024-sm6350-camss-v1-0-63d626638add@fairphone.com >>> >>> --- >>> Luca Weiss (3): >>> dt-bindings: media: camss: Add qcom,sm6350-camss >>> media: qcom: camss: Add SM6350 support >>> arm64: dts: qcom: sm6350: Add CAMSS node >>> >>> .../bindings/media/qcom,sm6350-camss.yaml | 471 +++++++++++++++++++++ >>> arch/arm64/boot/dts/qcom/sm6350.dtsi | 233 ++++++++++ >>> .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 125 ++++++ >>> drivers/media/platform/qcom/camss/camss-vfe.c | 2 + >>> drivers/media/platform/qcom/camss/camss.c | 261 ++++++++++++ >>> drivers/media/platform/qcom/camss/camss.h | 1 + >>> 6 files changed, 1093 insertions(+) >>> --- >>> base-commit: 3daf23347bb5f4a375d0101ed29c97ce1a99721b >>> change-id: 20251024-sm6350-camss-9c404bf9cfdd >>> >>> Best regards, > What about taking the clock out of hardware gated mode ? ┌─[deckard@sagittarius-a] - [~/Development/qualcomm/qlt-kernel] - [Fri Apr 03, 16:05] └─[$]> git diff diff --git a/drivers/clk/qcom/gcc-sm6350.c b/drivers/clk/qcom/gcc-sm6350.c index a4d6dff9d0f7f..f98cb35bcd408 100644 --- a/drivers/clk/qcom/gcc-sm6350.c +++ b/drivers/clk/qcom/gcc-sm6350.c @@ -909,8 +909,6 @@ static struct clk_branch gcc_camera_ahb_clk = { static struct clk_branch gcc_camera_axi_clk = { .halt_reg = 0x17018, .halt_check = BRANCH_HALT, - .hwcg_reg = 0x17018, - .hwcg_bit = 1, .clkr = { .enable_reg = 0x17018, .enable_mask = BIT(0), --- bod ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v4 0/3] Add CAMSS support for SM6350 2026-04-03 15:07 ` Bryan O'Donoghue @ 2026-05-01 10:12 ` Luca Weiss 2026-05-01 22:32 ` Bryan O'Donoghue 0 siblings, 1 reply; 15+ messages in thread From: Luca Weiss @ 2026-05-01 10:12 UTC (permalink / raw) To: Bryan O'Donoghue, Luca Weiss, Vladimir Zapolskiy Cc: Konrad Dybcio, Bryan O'Donoghue, Conor Dooley, Robert Foss, ~postmarketos/upstreaming, phone-devel, linux-arm-msm, linux-media, devicetree, linux-kernel, Krzysztof Kozlowski, Todor Tomov, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Bjorn Andersson Hi Bryan, On Fri Apr 3, 2026 at 5:07 PM CEST, Bryan O'Donoghue wrote: > On 03/04/2026 09:09, Luca Weiss wrote: >> Hi Vladimir, >> >> On Tue Mar 31, 2026 at 12:49 AM CEST, Vladimir Zapolskiy wrote: >>> Hi Luca, >>> >>> On 2/16/26 10:54, Luca Weiss wrote: >>>> Add bindings, driver and dts to support the Camera Subsystem on the >>>> SM6350 SoC. >>>> >>>> These patches were tested on a Fairphone 4 smartphone with WIP sensor >>>> drivers (Sony IMX576 and IMX582), the camera pipeline works properly as >>>> far as I can tell. >>>> >>>> Though when stopping the camera stream, the following clock warning >>>> appears in dmesg. But it does not interfere with any functionality, >>>> starting and stopping the stream works and debugcc is showing 426.4 MHz >>>> while the clock is on, and 'off' while it's off. >>>> >>>> Any suggestion how to fix this, is appreciated. >>> >>> I've looked at CAMCC recently, and I do notice that SM6350 CAMCC does not >>> set '.use_rpm = true' flag for whatever reason. >>> >>> If you find a free minute, can you test the change below?.. >> >> Unfortunately that change does not resolve the "gcc_camera_axi_clk >> status stuck at 'on'" warning. >> >> fairphone-fp4:~$ cat /sys/bus/platform/drivers/sm6350-camcc/ad00000.clock-controller/power/runtime_status >> active >> >> fairphone-fp4:~$ cat /sys/bus/platform/drivers/sm6350-camcc/ad00000.clock-controller/power/runtime_status >> suspended >> >>> >>> ----8<---- >>> diff --git a/drivers/clk/qcom/camcc-sm6350.c b/drivers/clk/qcom/camcc-sm6350.c >>> index 7df12c1311c6..ba880e4edcaf 100644 >>> --- a/drivers/clk/qcom/camcc-sm6350.c >>> +++ b/drivers/clk/qcom/camcc-sm6350.c >>> @@ -1880,6 +1880,7 @@ static const struct qcom_cc_desc camcc_sm6350_desc = { >>> .num_clks = ARRAY_SIZE(camcc_sm6350_clocks), >>> .gdscs = camcc_sm6350_gdscs, >>> .num_gdscs = ARRAY_SIZE(camcc_sm6350_gdscs), >>> + .use_rpm = true, >>> }; >>> >>> static const struct of_device_id camcc_sm6350_match_table[] = { >>> ----8<---- >>> >>> This change could be considered to be included in any case, I believe. >> >> I guess this change is now the way to enable pm_runtime, I had this >> series 3 years ago in February 2023: >> https://lore.kernel.org/linux-arm-msm/20230213-sm6350-camcc-runtime_pm-v3-0-d35e0d833cc4@fairphone.com/ >> >> But I never followed up due to me not understanding pm_runtime well and >> no direct need for it. >> >> But I guess reviving that with use_rpm = true, add power-domains & >> required-opps to dt-bindings and sm6350.dtsi should be a good idea? >> >> Regards >> Luca >> >>> >>>> [ 5738.590980] ------------[ cut here ]------------ >>>> [ 5738.591009] gcc_camera_axi_clk status stuck at 'on' >>>> [ 5738.591049] WARNING: CPU: 0 PID: 6918 at drivers/clk/qcom/clk-branch.c:87 clk_branch_toggle+0x170/0x190 >>>> [ 5738.591081] Modules linked in: >>>> [ 5738.591099] CPU: 0 UID: 10000 PID: 6918 Comm: plasma-camera Tainted: G W 6.17.0-00057-ge6b67db49622 #71 NONE >>>> [ 5738.591118] Tainted: [W]=WARN >>>> [ 5738.591126] Hardware name: Fairphone 4 (DT) >>>> [ 5738.591136] pstate: 604000c5 (nZCv daIF +PAN -UAO -TCO -DIT -SSBS BTYPE=--) >>>> [ 5738.591150] pc : clk_branch_toggle+0x170/0x190 >>>> [ 5738.591164] lr : clk_branch_toggle+0x170/0x190 >>>> [ 5738.591177] sp : ffff800086ed3980 >>>> [ 5738.591184] x29: ffff800086ed3990 x28: 0000000000000001 x27: ffff800086ed3cd8 >>>> [ 5738.591208] x26: 0000000000000000 x25: ffffda14fcfbd250 x24: 0000000000000000 >>>> [ 5738.591230] x23: 0000000000000000 x22: ffffda14fc38bce0 x21: 0000000000000000 >>>> [ 5738.591252] x20: ffffda14fd33e618 x19: 0000000000000000 x18: 00000000000064c8 >>>> [ 5738.591274] x17: 0000000000000000 x16: 00001ae003667e9e x15: ffffda14fd2a07b0 >>>> [ 5738.591295] x14: 0000000000000000 x13: 6f27207461206b63 x12: 7574732073757461 >>>> [ 5738.591317] x11: 0000000000000058 x10: 0000000000000018 x9 : ffffda14fd2a0838 >>>> [ 5738.591338] x8 : 0000000000057fa8 x7 : 0000000000000a16 x6 : ffffda14fd2f8838 >>>> [ 5738.591360] x5 : ffff0001f6f59788 x4 : 0000000000000a15 x3 : ffff25ecf9d7e000 >>>> [ 5738.591381] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff0000baf5c100 >>>> [ 5738.591403] Call trace: >>>> [ 5738.591412] clk_branch_toggle+0x170/0x190 (P) >>>> [ 5738.591429] clk_branch2_disable+0x1c/0x30 >>>> [ 5738.591445] clk_core_disable+0x5c/0xb4 >>>> [ 5738.591462] clk_disable+0x38/0x60 >>>> [ 5738.591478] camss_disable_clocks+0x44/0x78 >>>> [ 5738.591496] vfe_put+0x7c/0xc0 >>>> [ 5738.591512] vfe_set_power+0x40/0x50 >>>> [ 5738.591528] pipeline_pm_power_one+0x14c/0x150 >>>> [ 5738.591546] pipeline_pm_power+0x74/0xf4 >>>> [ 5738.591561] v4l2_pipeline_pm_use+0x54/0x9c >>>> [ 5738.591577] v4l2_pipeline_pm_put+0x14/0x40 >>>> [ 5738.591592] video_unprepare_streaming+0x18/0x24 >>>> [ 5738.591608] __vb2_queue_cancel+0x4c/0x314 >>>> [ 5738.591626] vb2_core_streamoff+0x24/0xc8 >>>> [ 5738.591643] vb2_ioctl_streamoff+0x58/0x98 >>>> [ 5738.591657] v4l_streamoff+0x24/0x30 >>>> [ 5738.591672] __video_do_ioctl+0x430/0x4a8 >>>> [ 5738.591689] video_usercopy+0x2ac/0x680 >>>> [ 5738.591705] video_ioctl2+0x18/0x40 >>>> [ 5738.591720] v4l2_ioctl+0x40/0x60 >>>> [ 5738.591734] __arm64_sys_ioctl+0x90/0xf0 >>>> [ 5738.591750] invoke_syscall.constprop.0+0x40/0xf0 >>>> [ 5738.591769] el0_svc_common.constprop.0+0x38/0xd8 >>>> [ 5738.591785] do_el0_svc+0x1c/0x28 >>>> [ 5738.591801] el0_svc+0x34/0xe8 >>>> [ 5738.591820] el0t_64_sync_handler+0xa0/0xe4 >>>> [ 5738.591838] el0t_64_sync+0x198/0x19c >>>> [ 5738.591854] ---[ end trace 0000000000000000 ]--- >>>> >>>> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> >>>> --- >>>> Changes in v4: >>>> - Update power-domain-names order (Krzysztof) >>>> - Make hex numbers lower case in init seq (David) >>>> - Pick up tags >>>> - Link to v3: https://lore.kernel.org/r/20260213-sm6350-camss-v3-0-30a845b0b7cc@fairphone.com >>> >>> Should find some time myself to issue RBs, sorry for the delay. >>> >>>> Changes in v3: >>>> - Update dt-bindings to include everything related to camss >>>> - Update regulator names >>>> - Remove slow_ahb_src >>>> - Link to v2: https://lore.kernel.org/r/20251114-sm6350-camss-v2-0-d1ff67da33b6@fairphone.com >>>> >>>> Changes in v2: >>>> - Remove prefix from interconnect-names >>>> - Move 'top' power-domain to the top of list >>>> - Update regulator supply names >>>> - Link to v1: https://lore.kernel.org/r/20251024-sm6350-camss-v1-0-63d626638add@fairphone.com >>>> >>>> --- >>>> Luca Weiss (3): >>>> dt-bindings: media: camss: Add qcom,sm6350-camss >>>> media: qcom: camss: Add SM6350 support >>>> arm64: dts: qcom: sm6350: Add CAMSS node >>>> >>>> .../bindings/media/qcom,sm6350-camss.yaml | 471 +++++++++++++++++++++ >>>> arch/arm64/boot/dts/qcom/sm6350.dtsi | 233 ++++++++++ >>>> .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 125 ++++++ >>>> drivers/media/platform/qcom/camss/camss-vfe.c | 2 + >>>> drivers/media/platform/qcom/camss/camss.c | 261 ++++++++++++ >>>> drivers/media/platform/qcom/camss/camss.h | 1 + >>>> 6 files changed, 1093 insertions(+) >>>> --- >>>> base-commit: 3daf23347bb5f4a375d0101ed29c97ce1a99721b >>>> change-id: 20251024-sm6350-camss-9c404bf9cfdd >>>> >>>> Best regards, >> > > What about taking the clock out of hardware gated mode ? > > ┌─[deckard@sagittarius-a] - [~/Development/qualcomm/qlt-kernel] - [Fri > Apr 03, 16:05] > └─[$]> git diff > diff --git a/drivers/clk/qcom/gcc-sm6350.c b/drivers/clk/qcom/gcc-sm6350.c > index a4d6dff9d0f7f..f98cb35bcd408 100644 > --- a/drivers/clk/qcom/gcc-sm6350.c > +++ b/drivers/clk/qcom/gcc-sm6350.c > @@ -909,8 +909,6 @@ static struct clk_branch gcc_camera_ahb_clk = { > static struct clk_branch gcc_camera_axi_clk = { > .halt_reg = 0x17018, > .halt_check = BRANCH_HALT, > - .hwcg_reg = 0x17018, > - .hwcg_bit = 1, Unfortunately this change has no effect, still getting the same error [ 192.154311] ------------[ cut here ]------------ [ 192.154339] gcc_camera_axi_clk status stuck at 'on' [ 192.154364] WARNING: drivers/clk/qcom/clk-branch.c:87 at clk_branch_toggle+0x170/0x190, CPU#5: CameraManager/5996 [ 192.154387] Modules linked in: [ 192.154403] CPU: 5 UID: 10000 PID: 5996 Comm: CameraManager Tainted: G W 7.0.0-00074-gb9262f98394c-dirty #31 PREEMPTLAZY Regards Luca ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v4 0/3] Add CAMSS support for SM6350 2026-05-01 10:12 ` Luca Weiss @ 2026-05-01 22:32 ` Bryan O'Donoghue 2026-05-04 7:14 ` Luca Weiss 0 siblings, 1 reply; 15+ messages in thread From: Bryan O'Donoghue @ 2026-05-01 22:32 UTC (permalink / raw) To: Luca Weiss, Bryan O'Donoghue, Vladimir Zapolskiy Cc: Konrad Dybcio, Conor Dooley, Robert Foss, ~postmarketos/upstreaming, phone-devel, linux-arm-msm, linux-media, devicetree, linux-kernel, Krzysztof Kozlowski, Todor Tomov, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Bjorn Andersson On 01/05/2026 11:12, Luca Weiss wrote: > Hi Bryan, > > On Fri Apr 3, 2026 at 5:07 PM CEST, Bryan O'Donoghue wrote: >> On 03/04/2026 09:09, Luca Weiss wrote: >>> Hi Vladimir, >>> >>> On Tue Mar 31, 2026 at 12:49 AM CEST, Vladimir Zapolskiy wrote: >>>> Hi Luca, >>>> >>>> On 2/16/26 10:54, Luca Weiss wrote: >>>>> Add bindings, driver and dts to support the Camera Subsystem on the >>>>> SM6350 SoC. >>>>> >>>>> These patches were tested on a Fairphone 4 smartphone with WIP sensor >>>>> drivers (Sony IMX576 and IMX582), the camera pipeline works properly as >>>>> far as I can tell. >>>>> >>>>> Though when stopping the camera stream, the following clock warning >>>>> appears in dmesg. But it does not interfere with any functionality, >>>>> starting and stopping the stream works and debugcc is showing 426.4 MHz >>>>> while the clock is on, and 'off' while it's off. >>>>> >>>>> Any suggestion how to fix this, is appreciated. >>>> >>>> I've looked at CAMCC recently, and I do notice that SM6350 CAMCC does not >>>> set '.use_rpm = true' flag for whatever reason. >>>> >>>> If you find a free minute, can you test the change below?.. >>> >>> Unfortunately that change does not resolve the "gcc_camera_axi_clk >>> status stuck at 'on'" warning. >>> >>> fairphone-fp4:~$ cat /sys/bus/platform/drivers/sm6350-camcc/ad00000.clock-controller/power/runtime_status >>> active >>> >>> fairphone-fp4:~$ cat /sys/bus/platform/drivers/sm6350-camcc/ad00000.clock-controller/power/runtime_status >>> suspended >>> >>>> >>>> ----8<---- >>>> diff --git a/drivers/clk/qcom/camcc-sm6350.c b/drivers/clk/qcom/camcc-sm6350.c >>>> index 7df12c1311c6..ba880e4edcaf 100644 >>>> --- a/drivers/clk/qcom/camcc-sm6350.c >>>> +++ b/drivers/clk/qcom/camcc-sm6350.c >>>> @@ -1880,6 +1880,7 @@ static const struct qcom_cc_desc camcc_sm6350_desc = { >>>> .num_clks = ARRAY_SIZE(camcc_sm6350_clocks), >>>> .gdscs = camcc_sm6350_gdscs, >>>> .num_gdscs = ARRAY_SIZE(camcc_sm6350_gdscs), >>>> + .use_rpm = true, >>>> }; >>>> >>>> static const struct of_device_id camcc_sm6350_match_table[] = { >>>> ----8<---- >>>> >>>> This change could be considered to be included in any case, I believe. >>> >>> I guess this change is now the way to enable pm_runtime, I had this >>> series 3 years ago in February 2023: >>> https://lore.kernel.org/linux-arm-msm/20230213-sm6350-camcc-runtime_pm-v3-0-d35e0d833cc4@fairphone.com/ >>> >>> But I never followed up due to me not understanding pm_runtime well and >>> no direct need for it. >>> >>> But I guess reviving that with use_rpm = true, add power-domains & >>> required-opps to dt-bindings and sm6350.dtsi should be a good idea? >>> >>> Regards >>> Luca >>> >>>> >>>>> [ 5738.590980] ------------[ cut here ]------------ >>>>> [ 5738.591009] gcc_camera_axi_clk status stuck at 'on' >>>>> [ 5738.591049] WARNING: CPU: 0 PID: 6918 at drivers/clk/qcom/clk-branch.c:87 clk_branch_toggle+0x170/0x190 >>>>> [ 5738.591081] Modules linked in: >>>>> [ 5738.591099] CPU: 0 UID: 10000 PID: 6918 Comm: plasma-camera Tainted: G W 6.17.0-00057-ge6b67db49622 #71 NONE >>>>> [ 5738.591118] Tainted: [W]=WARN >>>>> [ 5738.591126] Hardware name: Fairphone 4 (DT) >>>>> [ 5738.591136] pstate: 604000c5 (nZCv daIF +PAN -UAO -TCO -DIT -SSBS BTYPE=--) >>>>> [ 5738.591150] pc : clk_branch_toggle+0x170/0x190 >>>>> [ 5738.591164] lr : clk_branch_toggle+0x170/0x190 >>>>> [ 5738.591177] sp : ffff800086ed3980 >>>>> [ 5738.591184] x29: ffff800086ed3990 x28: 0000000000000001 x27: ffff800086ed3cd8 >>>>> [ 5738.591208] x26: 0000000000000000 x25: ffffda14fcfbd250 x24: 0000000000000000 >>>>> [ 5738.591230] x23: 0000000000000000 x22: ffffda14fc38bce0 x21: 0000000000000000 >>>>> [ 5738.591252] x20: ffffda14fd33e618 x19: 0000000000000000 x18: 00000000000064c8 >>>>> [ 5738.591274] x17: 0000000000000000 x16: 00001ae003667e9e x15: ffffda14fd2a07b0 >>>>> [ 5738.591295] x14: 0000000000000000 x13: 6f27207461206b63 x12: 7574732073757461 >>>>> [ 5738.591317] x11: 0000000000000058 x10: 0000000000000018 x9 : ffffda14fd2a0838 >>>>> [ 5738.591338] x8 : 0000000000057fa8 x7 : 0000000000000a16 x6 : ffffda14fd2f8838 >>>>> [ 5738.591360] x5 : ffff0001f6f59788 x4 : 0000000000000a15 x3 : ffff25ecf9d7e000 >>>>> [ 5738.591381] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff0000baf5c100 >>>>> [ 5738.591403] Call trace: >>>>> [ 5738.591412] clk_branch_toggle+0x170/0x190 (P) >>>>> [ 5738.591429] clk_branch2_disable+0x1c/0x30 >>>>> [ 5738.591445] clk_core_disable+0x5c/0xb4 >>>>> [ 5738.591462] clk_disable+0x38/0x60 >>>>> [ 5738.591478] camss_disable_clocks+0x44/0x78 >>>>> [ 5738.591496] vfe_put+0x7c/0xc0 >>>>> [ 5738.591512] vfe_set_power+0x40/0x50 >>>>> [ 5738.591528] pipeline_pm_power_one+0x14c/0x150 >>>>> [ 5738.591546] pipeline_pm_power+0x74/0xf4 >>>>> [ 5738.591561] v4l2_pipeline_pm_use+0x54/0x9c >>>>> [ 5738.591577] v4l2_pipeline_pm_put+0x14/0x40 >>>>> [ 5738.591592] video_unprepare_streaming+0x18/0x24 >>>>> [ 5738.591608] __vb2_queue_cancel+0x4c/0x314 >>>>> [ 5738.591626] vb2_core_streamoff+0x24/0xc8 >>>>> [ 5738.591643] vb2_ioctl_streamoff+0x58/0x98 >>>>> [ 5738.591657] v4l_streamoff+0x24/0x30 >>>>> [ 5738.591672] __video_do_ioctl+0x430/0x4a8 >>>>> [ 5738.591689] video_usercopy+0x2ac/0x680 >>>>> [ 5738.591705] video_ioctl2+0x18/0x40 >>>>> [ 5738.591720] v4l2_ioctl+0x40/0x60 >>>>> [ 5738.591734] __arm64_sys_ioctl+0x90/0xf0 >>>>> [ 5738.591750] invoke_syscall.constprop.0+0x40/0xf0 >>>>> [ 5738.591769] el0_svc_common.constprop.0+0x38/0xd8 >>>>> [ 5738.591785] do_el0_svc+0x1c/0x28 >>>>> [ 5738.591801] el0_svc+0x34/0xe8 >>>>> [ 5738.591820] el0t_64_sync_handler+0xa0/0xe4 >>>>> [ 5738.591838] el0t_64_sync+0x198/0x19c >>>>> [ 5738.591854] ---[ end trace 0000000000000000 ]--- >>>>> >>>>> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> >>>>> --- >>>>> Changes in v4: >>>>> - Update power-domain-names order (Krzysztof) >>>>> - Make hex numbers lower case in init seq (David) >>>>> - Pick up tags >>>>> - Link to v3: https://lore.kernel.org/r/20260213-sm6350-camss-v3-0-30a845b0b7cc@fairphone.com >>>> >>>> Should find some time myself to issue RBs, sorry for the delay. >>>> >>>>> Changes in v3: >>>>> - Update dt-bindings to include everything related to camss >>>>> - Update regulator names >>>>> - Remove slow_ahb_src >>>>> - Link to v2: https://lore.kernel.org/r/20251114-sm6350-camss-v2-0-d1ff67da33b6@fairphone.com >>>>> >>>>> Changes in v2: >>>>> - Remove prefix from interconnect-names >>>>> - Move 'top' power-domain to the top of list >>>>> - Update regulator supply names >>>>> - Link to v1: https://lore.kernel.org/r/20251024-sm6350-camss-v1-0-63d626638add@fairphone.com >>>>> >>>>> --- >>>>> Luca Weiss (3): >>>>> dt-bindings: media: camss: Add qcom,sm6350-camss >>>>> media: qcom: camss: Add SM6350 support >>>>> arm64: dts: qcom: sm6350: Add CAMSS node >>>>> >>>>> .../bindings/media/qcom,sm6350-camss.yaml | 471 +++++++++++++++++++++ >>>>> arch/arm64/boot/dts/qcom/sm6350.dtsi | 233 ++++++++++ >>>>> .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 125 ++++++ >>>>> drivers/media/platform/qcom/camss/camss-vfe.c | 2 + >>>>> drivers/media/platform/qcom/camss/camss.c | 261 ++++++++++++ >>>>> drivers/media/platform/qcom/camss/camss.h | 1 + >>>>> 6 files changed, 1093 insertions(+) >>>>> --- >>>>> base-commit: 3daf23347bb5f4a375d0101ed29c97ce1a99721b >>>>> change-id: 20251024-sm6350-camss-9c404bf9cfdd >>>>> >>>>> Best regards, >>> >> >> What about taking the clock out of hardware gated mode ? >> >> ┌─[deckard@sagittarius-a] - [~/Development/qualcomm/qlt-kernel] - [Fri >> Apr 03, 16:05] >> └─[$]> git diff >> diff --git a/drivers/clk/qcom/gcc-sm6350.c b/drivers/clk/qcom/gcc-sm6350.c >> index a4d6dff9d0f7f..f98cb35bcd408 100644 >> --- a/drivers/clk/qcom/gcc-sm6350.c >> +++ b/drivers/clk/qcom/gcc-sm6350.c >> @@ -909,8 +909,6 @@ static struct clk_branch gcc_camera_ahb_clk = { >> static struct clk_branch gcc_camera_axi_clk = { >> .halt_reg = 0x17018, >> .halt_check = BRANCH_HALT, >> - .hwcg_reg = 0x17018, >> - .hwcg_bit = 1, > > Unfortunately this change has no effect, still getting the same error > > [ 192.154311] ------------[ cut here ]------------ > [ 192.154339] gcc_camera_axi_clk status stuck at 'on' > [ 192.154364] WARNING: drivers/clk/qcom/clk-branch.c:87 at clk_branch_toggle+0x170/0x190, CPU#5: CameraManager/5996 > [ 192.154387] Modules linked in: > [ 192.154403] CPU: 5 UID: 10000 PID: 5996 Comm: CameraManager Tainted: G W 7.0.0-00074-gb9262f98394c-dirty #31 PREEMPTLAZY > > Regards > Luca Sorry wait a second did you say you had a fix for this around CX ? https://lore.kernel.org/linux-arm-msm/20230213-sm6350-camcc-runtime_pm-v3-2-d35e0d833cc4@fairphone.com/ Is this series adding or missing power-domains = <CX> ? Shouldn't this be in the gcc node ? + power-domains = <&rpmhpd SM6350_CX>; + required-opps = <&rpmhpd_opp_low_svs>; --- bod ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v4 0/3] Add CAMSS support for SM6350 2026-05-01 22:32 ` Bryan O'Donoghue @ 2026-05-04 7:14 ` Luca Weiss 2026-05-04 11:18 ` Bryan O'Donoghue 0 siblings, 1 reply; 15+ messages in thread From: Luca Weiss @ 2026-05-04 7:14 UTC (permalink / raw) To: Bryan O'Donoghue, Luca Weiss, Bryan O'Donoghue, Vladimir Zapolskiy Cc: Konrad Dybcio, Conor Dooley, Robert Foss, ~postmarketos/upstreaming, phone-devel, linux-arm-msm, linux-media, devicetree, linux-kernel, Krzysztof Kozlowski, Todor Tomov, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Bjorn Andersson Hi Bryan, On Sat May 2, 2026 at 12:32 AM CEST, Bryan O'Donoghue wrote: > On 01/05/2026 11:12, Luca Weiss wrote: >> Hi Bryan, >> >> On Fri Apr 3, 2026 at 5:07 PM CEST, Bryan O'Donoghue wrote: >>> On 03/04/2026 09:09, Luca Weiss wrote: >>>> Hi Vladimir, >>>> >>>> On Tue Mar 31, 2026 at 12:49 AM CEST, Vladimir Zapolskiy wrote: >>>>> Hi Luca, >>>>> >>>>> On 2/16/26 10:54, Luca Weiss wrote: >>>>>> Add bindings, driver and dts to support the Camera Subsystem on the >>>>>> SM6350 SoC. >>>>>> >>>>>> These patches were tested on a Fairphone 4 smartphone with WIP sensor >>>>>> drivers (Sony IMX576 and IMX582), the camera pipeline works properly as >>>>>> far as I can tell. >>>>>> >>>>>> Though when stopping the camera stream, the following clock warning >>>>>> appears in dmesg. But it does not interfere with any functionality, >>>>>> starting and stopping the stream works and debugcc is showing 426.4 MHz >>>>>> while the clock is on, and 'off' while it's off. >>>>>> >>>>>> Any suggestion how to fix this, is appreciated. >>>>> >>>>> I've looked at CAMCC recently, and I do notice that SM6350 CAMCC does not >>>>> set '.use_rpm = true' flag for whatever reason. >>>>> >>>>> If you find a free minute, can you test the change below?.. >>>> >>>> Unfortunately that change does not resolve the "gcc_camera_axi_clk >>>> status stuck at 'on'" warning. >>>> >>>> fairphone-fp4:~$ cat /sys/bus/platform/drivers/sm6350-camcc/ad00000.clock-controller/power/runtime_status >>>> active >>>> >>>> fairphone-fp4:~$ cat /sys/bus/platform/drivers/sm6350-camcc/ad00000.clock-controller/power/runtime_status >>>> suspended >>>> >>>>> >>>>> ----8<---- >>>>> diff --git a/drivers/clk/qcom/camcc-sm6350.c b/drivers/clk/qcom/camcc-sm6350.c >>>>> index 7df12c1311c6..ba880e4edcaf 100644 >>>>> --- a/drivers/clk/qcom/camcc-sm6350.c >>>>> +++ b/drivers/clk/qcom/camcc-sm6350.c >>>>> @@ -1880,6 +1880,7 @@ static const struct qcom_cc_desc camcc_sm6350_desc = { >>>>> .num_clks = ARRAY_SIZE(camcc_sm6350_clocks), >>>>> .gdscs = camcc_sm6350_gdscs, >>>>> .num_gdscs = ARRAY_SIZE(camcc_sm6350_gdscs), >>>>> + .use_rpm = true, >>>>> }; >>>>> >>>>> static const struct of_device_id camcc_sm6350_match_table[] = { >>>>> ----8<---- >>>>> >>>>> This change could be considered to be included in any case, I believe. >>>> >>>> I guess this change is now the way to enable pm_runtime, I had this >>>> series 3 years ago in February 2023: >>>> https://lore.kernel.org/linux-arm-msm/20230213-sm6350-camcc-runtime_pm-v3-0-d35e0d833cc4@fairphone.com/ >>>> >>>> But I never followed up due to me not understanding pm_runtime well and >>>> no direct need for it. >>>> >>>> But I guess reviving that with use_rpm = true, add power-domains & >>>> required-opps to dt-bindings and sm6350.dtsi should be a good idea? >>>> >>>> Regards >>>> Luca >>>> >>>>> >>>>>> [ 5738.590980] ------------[ cut here ]------------ >>>>>> [ 5738.591009] gcc_camera_axi_clk status stuck at 'on' >>>>>> [ 5738.591049] WARNING: CPU: 0 PID: 6918 at drivers/clk/qcom/clk-branch.c:87 clk_branch_toggle+0x170/0x190 >>>>>> [ 5738.591081] Modules linked in: >>>>>> [ 5738.591099] CPU: 0 UID: 10000 PID: 6918 Comm: plasma-camera Tainted: G W 6.17.0-00057-ge6b67db49622 #71 NONE >>>>>> [ 5738.591118] Tainted: [W]=WARN >>>>>> [ 5738.591126] Hardware name: Fairphone 4 (DT) >>>>>> [ 5738.591136] pstate: 604000c5 (nZCv daIF +PAN -UAO -TCO -DIT -SSBS BTYPE=--) >>>>>> [ 5738.591150] pc : clk_branch_toggle+0x170/0x190 >>>>>> [ 5738.591164] lr : clk_branch_toggle+0x170/0x190 >>>>>> [ 5738.591177] sp : ffff800086ed3980 >>>>>> [ 5738.591184] x29: ffff800086ed3990 x28: 0000000000000001 x27: ffff800086ed3cd8 >>>>>> [ 5738.591208] x26: 0000000000000000 x25: ffffda14fcfbd250 x24: 0000000000000000 >>>>>> [ 5738.591230] x23: 0000000000000000 x22: ffffda14fc38bce0 x21: 0000000000000000 >>>>>> [ 5738.591252] x20: ffffda14fd33e618 x19: 0000000000000000 x18: 00000000000064c8 >>>>>> [ 5738.591274] x17: 0000000000000000 x16: 00001ae003667e9e x15: ffffda14fd2a07b0 >>>>>> [ 5738.591295] x14: 0000000000000000 x13: 6f27207461206b63 x12: 7574732073757461 >>>>>> [ 5738.591317] x11: 0000000000000058 x10: 0000000000000018 x9 : ffffda14fd2a0838 >>>>>> [ 5738.591338] x8 : 0000000000057fa8 x7 : 0000000000000a16 x6 : ffffda14fd2f8838 >>>>>> [ 5738.591360] x5 : ffff0001f6f59788 x4 : 0000000000000a15 x3 : ffff25ecf9d7e000 >>>>>> [ 5738.591381] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff0000baf5c100 >>>>>> [ 5738.591403] Call trace: >>>>>> [ 5738.591412] clk_branch_toggle+0x170/0x190 (P) >>>>>> [ 5738.591429] clk_branch2_disable+0x1c/0x30 >>>>>> [ 5738.591445] clk_core_disable+0x5c/0xb4 >>>>>> [ 5738.591462] clk_disable+0x38/0x60 >>>>>> [ 5738.591478] camss_disable_clocks+0x44/0x78 >>>>>> [ 5738.591496] vfe_put+0x7c/0xc0 >>>>>> [ 5738.591512] vfe_set_power+0x40/0x50 >>>>>> [ 5738.591528] pipeline_pm_power_one+0x14c/0x150 >>>>>> [ 5738.591546] pipeline_pm_power+0x74/0xf4 >>>>>> [ 5738.591561] v4l2_pipeline_pm_use+0x54/0x9c >>>>>> [ 5738.591577] v4l2_pipeline_pm_put+0x14/0x40 >>>>>> [ 5738.591592] video_unprepare_streaming+0x18/0x24 >>>>>> [ 5738.591608] __vb2_queue_cancel+0x4c/0x314 >>>>>> [ 5738.591626] vb2_core_streamoff+0x24/0xc8 >>>>>> [ 5738.591643] vb2_ioctl_streamoff+0x58/0x98 >>>>>> [ 5738.591657] v4l_streamoff+0x24/0x30 >>>>>> [ 5738.591672] __video_do_ioctl+0x430/0x4a8 >>>>>> [ 5738.591689] video_usercopy+0x2ac/0x680 >>>>>> [ 5738.591705] video_ioctl2+0x18/0x40 >>>>>> [ 5738.591720] v4l2_ioctl+0x40/0x60 >>>>>> [ 5738.591734] __arm64_sys_ioctl+0x90/0xf0 >>>>>> [ 5738.591750] invoke_syscall.constprop.0+0x40/0xf0 >>>>>> [ 5738.591769] el0_svc_common.constprop.0+0x38/0xd8 >>>>>> [ 5738.591785] do_el0_svc+0x1c/0x28 >>>>>> [ 5738.591801] el0_svc+0x34/0xe8 >>>>>> [ 5738.591820] el0t_64_sync_handler+0xa0/0xe4 >>>>>> [ 5738.591838] el0t_64_sync+0x198/0x19c >>>>>> [ 5738.591854] ---[ end trace 0000000000000000 ]--- >>>>>> >>>>>> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> >>>>>> --- >>>>>> Changes in v4: >>>>>> - Update power-domain-names order (Krzysztof) >>>>>> - Make hex numbers lower case in init seq (David) >>>>>> - Pick up tags >>>>>> - Link to v3: https://lore.kernel.org/r/20260213-sm6350-camss-v3-0-30a845b0b7cc@fairphone.com >>>>> >>>>> Should find some time myself to issue RBs, sorry for the delay. >>>>> >>>>>> Changes in v3: >>>>>> - Update dt-bindings to include everything related to camss >>>>>> - Update regulator names >>>>>> - Remove slow_ahb_src >>>>>> - Link to v2: https://lore.kernel.org/r/20251114-sm6350-camss-v2-0-d1ff67da33b6@fairphone.com >>>>>> >>>>>> Changes in v2: >>>>>> - Remove prefix from interconnect-names >>>>>> - Move 'top' power-domain to the top of list >>>>>> - Update regulator supply names >>>>>> - Link to v1: https://lore.kernel.org/r/20251024-sm6350-camss-v1-0-63d626638add@fairphone.com >>>>>> >>>>>> --- >>>>>> Luca Weiss (3): >>>>>> dt-bindings: media: camss: Add qcom,sm6350-camss >>>>>> media: qcom: camss: Add SM6350 support >>>>>> arm64: dts: qcom: sm6350: Add CAMSS node >>>>>> >>>>>> .../bindings/media/qcom,sm6350-camss.yaml | 471 +++++++++++++++++++++ >>>>>> arch/arm64/boot/dts/qcom/sm6350.dtsi | 233 ++++++++++ >>>>>> .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 125 ++++++ >>>>>> drivers/media/platform/qcom/camss/camss-vfe.c | 2 + >>>>>> drivers/media/platform/qcom/camss/camss.c | 261 ++++++++++++ >>>>>> drivers/media/platform/qcom/camss/camss.h | 1 + >>>>>> 6 files changed, 1093 insertions(+) >>>>>> --- >>>>>> base-commit: 3daf23347bb5f4a375d0101ed29c97ce1a99721b >>>>>> change-id: 20251024-sm6350-camss-9c404bf9cfdd >>>>>> >>>>>> Best regards, >>>> >>> >>> What about taking the clock out of hardware gated mode ? >>> >>> ┌─[deckard@sagittarius-a] - [~/Development/qualcomm/qlt-kernel] - [Fri >>> Apr 03, 16:05] >>> └─[$]> git diff >>> diff --git a/drivers/clk/qcom/gcc-sm6350.c b/drivers/clk/qcom/gcc-sm6350.c >>> index a4d6dff9d0f7f..f98cb35bcd408 100644 >>> --- a/drivers/clk/qcom/gcc-sm6350.c >>> +++ b/drivers/clk/qcom/gcc-sm6350.c >>> @@ -909,8 +909,6 @@ static struct clk_branch gcc_camera_ahb_clk = { >>> static struct clk_branch gcc_camera_axi_clk = { >>> .halt_reg = 0x17018, >>> .halt_check = BRANCH_HALT, >>> - .hwcg_reg = 0x17018, >>> - .hwcg_bit = 1, >> >> Unfortunately this change has no effect, still getting the same error >> >> [ 192.154311] ------------[ cut here ]------------ >> [ 192.154339] gcc_camera_axi_clk status stuck at 'on' >> [ 192.154364] WARNING: drivers/clk/qcom/clk-branch.c:87 at clk_branch_toggle+0x170/0x190, CPU#5: CameraManager/5996 >> [ 192.154387] Modules linked in: >> [ 192.154403] CPU: 5 UID: 10000 PID: 5996 Comm: CameraManager Tainted: G W 7.0.0-00074-gb9262f98394c-dirty #31 PREEMPTLAZY >> >> Regards >> Luca > > Sorry wait a second did you say you had a fix for this around CX ? > > https://lore.kernel.org/linux-arm-msm/20230213-sm6350-camcc-runtime_pm-v3-2-d35e0d833cc4@fairphone.com/ > > Is this series adding or missing power-domains = <CX> ? > > Shouldn't this be in the gcc node ? > > + power-domains = <&rpmhpd SM6350_CX>; > + required-opps = <&rpmhpd_opp_low_svs>; In this thread I've tried ".use_rpm = true" for *camcc* - which I believe is the modern equivalent to all the code added in the linked series. For gcc I don't believe I've tried adding anything. But practically, isn't CX always on anyways, especially with screen on and everthing, so practically it shouldn't make any difference? Regards Luca ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v4 0/3] Add CAMSS support for SM6350 2026-05-04 7:14 ` Luca Weiss @ 2026-05-04 11:18 ` Bryan O'Donoghue 0 siblings, 0 replies; 15+ messages in thread From: Bryan O'Donoghue @ 2026-05-04 11:18 UTC (permalink / raw) To: Luca Weiss, Bryan O'Donoghue, Vladimir Zapolskiy Cc: Konrad Dybcio, Conor Dooley, Robert Foss, ~postmarketos/upstreaming, phone-devel, linux-arm-msm, linux-media, devicetree, linux-kernel, Krzysztof Kozlowski, Todor Tomov, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Bjorn Andersson On 04/05/2026 08:14, Luca Weiss wrote: > Hi Bryan, > > On Sat May 2, 2026 at 12:32 AM CEST, Bryan O'Donoghue wrote: >> On 01/05/2026 11:12, Luca Weiss wrote: >>> Hi Bryan, >>> >>> On Fri Apr 3, 2026 at 5:07 PM CEST, Bryan O'Donoghue wrote: >>>> On 03/04/2026 09:09, Luca Weiss wrote: >>>>> Hi Vladimir, >>>>> >>>>> On Tue Mar 31, 2026 at 12:49 AM CEST, Vladimir Zapolskiy wrote: >>>>>> Hi Luca, >>>>>> >>>>>> On 2/16/26 10:54, Luca Weiss wrote: >>>>>>> Add bindings, driver and dts to support the Camera Subsystem on the >>>>>>> SM6350 SoC. >>>>>>> >>>>>>> These patches were tested on a Fairphone 4 smartphone with WIP sensor >>>>>>> drivers (Sony IMX576 and IMX582), the camera pipeline works properly as >>>>>>> far as I can tell. >>>>>>> >>>>>>> Though when stopping the camera stream, the following clock warning >>>>>>> appears in dmesg. But it does not interfere with any functionality, >>>>>>> starting and stopping the stream works and debugcc is showing 426.4 MHz >>>>>>> while the clock is on, and 'off' while it's off. >>>>>>> >>>>>>> Any suggestion how to fix this, is appreciated. >>>>>> >>>>>> I've looked at CAMCC recently, and I do notice that SM6350 CAMCC does not >>>>>> set '.use_rpm = true' flag for whatever reason. >>>>>> >>>>>> If you find a free minute, can you test the change below?.. >>>>> >>>>> Unfortunately that change does not resolve the "gcc_camera_axi_clk >>>>> status stuck at 'on'" warning. >>>>> >>>>> fairphone-fp4:~$ cat /sys/bus/platform/drivers/sm6350-camcc/ad00000.clock-controller/power/runtime_status >>>>> active >>>>> >>>>> fairphone-fp4:~$ cat /sys/bus/platform/drivers/sm6350-camcc/ad00000.clock-controller/power/runtime_status >>>>> suspended >>>>> >>>>>> >>>>>> ----8<---- >>>>>> diff --git a/drivers/clk/qcom/camcc-sm6350.c b/drivers/clk/qcom/camcc-sm6350.c >>>>>> index 7df12c1311c6..ba880e4edcaf 100644 >>>>>> --- a/drivers/clk/qcom/camcc-sm6350.c >>>>>> +++ b/drivers/clk/qcom/camcc-sm6350.c >>>>>> @@ -1880,6 +1880,7 @@ static const struct qcom_cc_desc camcc_sm6350_desc = { >>>>>> .num_clks = ARRAY_SIZE(camcc_sm6350_clocks), >>>>>> .gdscs = camcc_sm6350_gdscs, >>>>>> .num_gdscs = ARRAY_SIZE(camcc_sm6350_gdscs), >>>>>> + .use_rpm = true, >>>>>> }; >>>>>> >>>>>> static const struct of_device_id camcc_sm6350_match_table[] = { >>>>>> ----8<---- >>>>>> >>>>>> This change could be considered to be included in any case, I believe. >>>>> >>>>> I guess this change is now the way to enable pm_runtime, I had this >>>>> series 3 years ago in February 2023: >>>>> https://lore.kernel.org/linux-arm-msm/20230213-sm6350-camcc-runtime_pm-v3-0-d35e0d833cc4@fairphone.com/ >>>>> >>>>> But I never followed up due to me not understanding pm_runtime well and >>>>> no direct need for it. >>>>> >>>>> But I guess reviving that with use_rpm = true, add power-domains & >>>>> required-opps to dt-bindings and sm6350.dtsi should be a good idea? >>>>> >>>>> Regards >>>>> Luca >>>>> >>>>>> >>>>>>> [ 5738.590980] ------------[ cut here ]------------ >>>>>>> [ 5738.591009] gcc_camera_axi_clk status stuck at 'on' >>>>>>> [ 5738.591049] WARNING: CPU: 0 PID: 6918 at drivers/clk/qcom/clk-branch.c:87 clk_branch_toggle+0x170/0x190 >>>>>>> [ 5738.591081] Modules linked in: >>>>>>> [ 5738.591099] CPU: 0 UID: 10000 PID: 6918 Comm: plasma-camera Tainted: G W 6.17.0-00057-ge6b67db49622 #71 NONE >>>>>>> [ 5738.591118] Tainted: [W]=WARN >>>>>>> [ 5738.591126] Hardware name: Fairphone 4 (DT) >>>>>>> [ 5738.591136] pstate: 604000c5 (nZCv daIF +PAN -UAO -TCO -DIT -SSBS BTYPE=--) >>>>>>> [ 5738.591150] pc : clk_branch_toggle+0x170/0x190 >>>>>>> [ 5738.591164] lr : clk_branch_toggle+0x170/0x190 >>>>>>> [ 5738.591177] sp : ffff800086ed3980 >>>>>>> [ 5738.591184] x29: ffff800086ed3990 x28: 0000000000000001 x27: ffff800086ed3cd8 >>>>>>> [ 5738.591208] x26: 0000000000000000 x25: ffffda14fcfbd250 x24: 0000000000000000 >>>>>>> [ 5738.591230] x23: 0000000000000000 x22: ffffda14fc38bce0 x21: 0000000000000000 >>>>>>> [ 5738.591252] x20: ffffda14fd33e618 x19: 0000000000000000 x18: 00000000000064c8 >>>>>>> [ 5738.591274] x17: 0000000000000000 x16: 00001ae003667e9e x15: ffffda14fd2a07b0 >>>>>>> [ 5738.591295] x14: 0000000000000000 x13: 6f27207461206b63 x12: 7574732073757461 >>>>>>> [ 5738.591317] x11: 0000000000000058 x10: 0000000000000018 x9 : ffffda14fd2a0838 >>>>>>> [ 5738.591338] x8 : 0000000000057fa8 x7 : 0000000000000a16 x6 : ffffda14fd2f8838 >>>>>>> [ 5738.591360] x5 : ffff0001f6f59788 x4 : 0000000000000a15 x3 : ffff25ecf9d7e000 >>>>>>> [ 5738.591381] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff0000baf5c100 >>>>>>> [ 5738.591403] Call trace: >>>>>>> [ 5738.591412] clk_branch_toggle+0x170/0x190 (P) >>>>>>> [ 5738.591429] clk_branch2_disable+0x1c/0x30 >>>>>>> [ 5738.591445] clk_core_disable+0x5c/0xb4 >>>>>>> [ 5738.591462] clk_disable+0x38/0x60 >>>>>>> [ 5738.591478] camss_disable_clocks+0x44/0x78 >>>>>>> [ 5738.591496] vfe_put+0x7c/0xc0 >>>>>>> [ 5738.591512] vfe_set_power+0x40/0x50 >>>>>>> [ 5738.591528] pipeline_pm_power_one+0x14c/0x150 >>>>>>> [ 5738.591546] pipeline_pm_power+0x74/0xf4 >>>>>>> [ 5738.591561] v4l2_pipeline_pm_use+0x54/0x9c >>>>>>> [ 5738.591577] v4l2_pipeline_pm_put+0x14/0x40 >>>>>>> [ 5738.591592] video_unprepare_streaming+0x18/0x24 >>>>>>> [ 5738.591608] __vb2_queue_cancel+0x4c/0x314 >>>>>>> [ 5738.591626] vb2_core_streamoff+0x24/0xc8 >>>>>>> [ 5738.591643] vb2_ioctl_streamoff+0x58/0x98 >>>>>>> [ 5738.591657] v4l_streamoff+0x24/0x30 >>>>>>> [ 5738.591672] __video_do_ioctl+0x430/0x4a8 >>>>>>> [ 5738.591689] video_usercopy+0x2ac/0x680 >>>>>>> [ 5738.591705] video_ioctl2+0x18/0x40 >>>>>>> [ 5738.591720] v4l2_ioctl+0x40/0x60 >>>>>>> [ 5738.591734] __arm64_sys_ioctl+0x90/0xf0 >>>>>>> [ 5738.591750] invoke_syscall.constprop.0+0x40/0xf0 >>>>>>> [ 5738.591769] el0_svc_common.constprop.0+0x38/0xd8 >>>>>>> [ 5738.591785] do_el0_svc+0x1c/0x28 >>>>>>> [ 5738.591801] el0_svc+0x34/0xe8 >>>>>>> [ 5738.591820] el0t_64_sync_handler+0xa0/0xe4 >>>>>>> [ 5738.591838] el0t_64_sync+0x198/0x19c >>>>>>> [ 5738.591854] ---[ end trace 0000000000000000 ]--- >>>>>>> >>>>>>> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> >>>>>>> --- >>>>>>> Changes in v4: >>>>>>> - Update power-domain-names order (Krzysztof) >>>>>>> - Make hex numbers lower case in init seq (David) >>>>>>> - Pick up tags >>>>>>> - Link to v3: https://lore.kernel.org/r/20260213-sm6350-camss-v3-0-30a845b0b7cc@fairphone.com >>>>>> >>>>>> Should find some time myself to issue RBs, sorry for the delay. >>>>>> >>>>>>> Changes in v3: >>>>>>> - Update dt-bindings to include everything related to camss >>>>>>> - Update regulator names >>>>>>> - Remove slow_ahb_src >>>>>>> - Link to v2: https://lore.kernel.org/r/20251114-sm6350-camss-v2-0-d1ff67da33b6@fairphone.com >>>>>>> >>>>>>> Changes in v2: >>>>>>> - Remove prefix from interconnect-names >>>>>>> - Move 'top' power-domain to the top of list >>>>>>> - Update regulator supply names >>>>>>> - Link to v1: https://lore.kernel.org/r/20251024-sm6350-camss-v1-0-63d626638add@fairphone.com >>>>>>> >>>>>>> --- >>>>>>> Luca Weiss (3): >>>>>>> dt-bindings: media: camss: Add qcom,sm6350-camss >>>>>>> media: qcom: camss: Add SM6350 support >>>>>>> arm64: dts: qcom: sm6350: Add CAMSS node >>>>>>> >>>>>>> .../bindings/media/qcom,sm6350-camss.yaml | 471 +++++++++++++++++++++ >>>>>>> arch/arm64/boot/dts/qcom/sm6350.dtsi | 233 ++++++++++ >>>>>>> .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 125 ++++++ >>>>>>> drivers/media/platform/qcom/camss/camss-vfe.c | 2 + >>>>>>> drivers/media/platform/qcom/camss/camss.c | 261 ++++++++++++ >>>>>>> drivers/media/platform/qcom/camss/camss.h | 1 + >>>>>>> 6 files changed, 1093 insertions(+) >>>>>>> --- >>>>>>> base-commit: 3daf23347bb5f4a375d0101ed29c97ce1a99721b >>>>>>> change-id: 20251024-sm6350-camss-9c404bf9cfdd >>>>>>> >>>>>>> Best regards, >>>>> >>>> >>>> What about taking the clock out of hardware gated mode ? >>>> >>>> ┌─[deckard@sagittarius-a] - [~/Development/qualcomm/qlt-kernel] - [Fri >>>> Apr 03, 16:05] >>>> └─[$]> git diff >>>> diff --git a/drivers/clk/qcom/gcc-sm6350.c b/drivers/clk/qcom/gcc-sm6350.c >>>> index a4d6dff9d0f7f..f98cb35bcd408 100644 >>>> --- a/drivers/clk/qcom/gcc-sm6350.c >>>> +++ b/drivers/clk/qcom/gcc-sm6350.c >>>> @@ -909,8 +909,6 @@ static struct clk_branch gcc_camera_ahb_clk = { >>>> static struct clk_branch gcc_camera_axi_clk = { >>>> .halt_reg = 0x17018, >>>> .halt_check = BRANCH_HALT, >>>> - .hwcg_reg = 0x17018, >>>> - .hwcg_bit = 1, >>> >>> Unfortunately this change has no effect, still getting the same error >>> >>> [ 192.154311] ------------[ cut here ]------------ >>> [ 192.154339] gcc_camera_axi_clk status stuck at 'on' >>> [ 192.154364] WARNING: drivers/clk/qcom/clk-branch.c:87 at clk_branch_toggle+0x170/0x190, CPU#5: CameraManager/5996 >>> [ 192.154387] Modules linked in: >>> [ 192.154403] CPU: 5 UID: 10000 PID: 5996 Comm: CameraManager Tainted: G W 7.0.0-00074-gb9262f98394c-dirty #31 PREEMPTLAZY >>> >>> Regards >>> Luca >> >> Sorry wait a second did you say you had a fix for this around CX ? >> >> https://lore.kernel.org/linux-arm-msm/20230213-sm6350-camcc-runtime_pm-v3-2-d35e0d833cc4@fairphone.com/ >> >> Is this series adding or missing power-domains = <CX> ? >> >> Shouldn't this be in the gcc node ? >> >> + power-domains = <&rpmhpd SM6350_CX>; >> + required-opps = <&rpmhpd_opp_low_svs>; > > In this thread I've tried ".use_rpm = true" for *camcc* - which I > believe is the modern equivalent to all the code added in the linked > series. > > For gcc I don't believe I've tried adding anything. gcc_camera_axi_clk is a GCC clock though. drivers/clk/qcom/gcc-sm6350.c:static struct clk_branch gcc_camera_axi_clk = { drivers/clk/qcom/gcc-sm6350.c: .name = "gcc_camera_axi_clk", > But practically, isn't CX always on anyways, especially with screen on > and everthing, so practically it shouldn't make any difference? > > Regards > Luca Yeah no it shouldn't which is why I wonder the patch you had did anything. No its not CX you're right, its your runtime PM patch and the ordering of the clock disables. I think three things to check. 1. Does your original patch still work with current upstream => ordering is still the issue 2. Can we change the ordering of the enable/disable in camss placing the AXI clock last ? 3. BRANCH_HALT_VOTED for gcc_camera_axi_clk #3 I don't think is really the reason but it might be worth an experiment. Lets think about this the camera GCC AXI clock is needed to access the registers inside the camera block, so logically it should be the last clock to be switched off and the first clock to be switched on. --- bod ^ permalink raw reply [flat|nested] 15+ messages in thread
[parent not found: <20260216-sm6350-camss-v4-1-b9df35f87edb@fairphone.com>]
* Re: [PATCH v4 1/3] dt-bindings: media: camss: Add qcom,sm6350-camss [not found] ` <20260216-sm6350-camss-v4-1-b9df35f87edb@fairphone.com> @ 2026-03-30 22:57 ` Vladimir Zapolskiy 2026-03-31 6:38 ` Luca Weiss 2026-03-31 8:50 ` Bryan O'Donoghue 1 sibling, 1 reply; 15+ messages in thread From: Vladimir Zapolskiy @ 2026-03-30 22:57 UTC (permalink / raw) To: Luca Weiss, Bryan O'Donoghue, Robert Foss, Todor Tomov, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bryan O'Donoghue, Bjorn Andersson, Konrad Dybcio Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm, linux-media, devicetree, linux-kernel, Krzysztof Kozlowski On 2/16/26 10:54, Luca Weiss wrote: > Add bindings for the Camera Subsystem on the SM6350 SoC. > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> > --- > .../bindings/media/qcom,sm6350-camss.yaml | 471 +++++++++++++++++++++ > 1 file changed, 471 insertions(+) > > diff --git a/Documentation/devicetree/bindings/media/qcom,sm6350-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm6350-camss.yaml > new file mode 100644 > index 000000000000..96974d90d8c4 > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/qcom,sm6350-camss.yaml > @@ -0,0 +1,471 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/media/qcom,sm6350-camss.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm SM6350 Camera Subsystem (CAMSS) > + > +maintainers: > + - Luca Weiss <luca.weiss@fairphone.com> > + > +description: > + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. > + > +properties: > + compatible: > + const: qcom,sm6350-camss > + > + reg: > + maxItems: 24 > + > + reg-names: > + items: > + - const: csid0 > + - const: csid1 > + - const: csid2 > + - const: csid_lite > + - const: csiphy0 > + - const: csiphy1 > + - const: csiphy2 > + - const: csiphy3 > + - const: vfe0 > + - const: vfe1 > + - const: vfe2 > + - const: vfe_lite > + - const: a5_csr > + - const: a5_qgic > + - const: a5_sierra > + - const: bps > + - const: camnoc > + - const: core_top_csr_tcsr > + - const: cpas_cdm > + - const: cpas_top > + - const: ipe > + - const: jpeg_dma > + - const: jpeg_enc > + - const: lrme > + > + clocks: > + maxItems: 39 > + > + clock-names: > + items: > + - const: cam_axi > + - const: soc_ahb > + - const: camnoc_axi > + - const: core_ahb > + - const: cpas_ahb > + - const: csiphy0 > + - const: csiphy0_timer > + - const: csiphy1 > + - const: csiphy1_timer > + - const: csiphy2 > + - const: csiphy2_timer > + - const: csiphy3 > + - const: csiphy3_timer > + - const: vfe0_axi > + - const: vfe0 > + - const: vfe0_cphy_rx > + - const: vfe0_csid > + - const: vfe1_axi > + - const: vfe1 > + - const: vfe1_cphy_rx > + - const: vfe1_csid > + - const: vfe2_axi > + - const: vfe2 > + - const: vfe2_cphy_rx > + - const: vfe2_csid > + - const: vfe_lite > + - const: vfe_lite_cphy_rx > + - const: vfe_lite_csid > + - const: bps > + - const: bps_ahb > + - const: bps_areg > + - const: bps_axi > + - const: icp > + - const: ipe0 > + - const: ipe0_ahb > + - const: ipe0_areg > + - const: ipe0_axi > + - const: jpeg > + - const: lrme > + > + interrupts: > + maxItems: 18 > + > + interrupt-names: > + items: > + - const: csid0 > + - const: csid1 > + - const: csid2 > + - const: csid_lite > + - const: csiphy0 > + - const: csiphy1 > + - const: csiphy2 > + - const: csiphy3 > + - const: vfe0 > + - const: vfe1 > + - const: vfe2 > + - const: vfe_lite > + - const: a5 > + - const: cpas > + - const: cpas_cdm > + - const: jpeg_dma > + - const: jpeg_enc > + - const: lrme > + > + interconnects: > + maxItems: 4 > + > + interconnect-names: > + items: > + - const: ahb > + - const: hf_mnoc > + - const: sf_mnoc > + - const: sf_icp_mnoc > + > + iommus: > + maxItems: 14 > + > + power-domains: > + maxItems: 6 > + > + power-domain-names: > + items: > + - const: ife0 > + - const: ife1 > + - const: ife2 > + - const: top > + - const: bps > + - const: ipe I've lost the content, why 'top' is somewhere in the middle? > + > + vdd-csiphy0-0p9-supply: > + description: > + Phandle to a 0.9V regulator supply to CSIPHY0. > + > + vdd-csiphy0-1p25-supply: > + description: > + Phandle to a 1.25V regulator supply to CSIPHY0. > + > + vdd-csiphy1-0p9-supply: > + description: > + Phandle to a 0.9V regulator supply to CSIPHY1. > + > + vdd-csiphy1-1p25-supply: > + description: > + Phandle to a 1.25V regulator supply to CSIPHY1. > + > + vdd-csiphy2-0p9-supply: > + description: > + Phandle to a 0.9V regulator supply to CSIPHY2. > + > + vdd-csiphy2-1p25-supply: > + description: > + Phandle to a 1.25V regulator supply to CSIPHY2. > + > + vdd-csiphy3-0p9-supply: > + description: > + Phandle to a 0.9V regulator supply to CSIPHY3. > + > + vdd-csiphy3-1p25-supply: > + description: > + Phandle to a 1.25V regulator supply to CSIPHY3. > + > + ports: > + $ref: /schemas/graph.yaml#/properties/ports > + > + description: > + CSI input ports. > + > + patternProperties: > + "^port@[0-3]$": > + $ref: /schemas/graph.yaml#/$defs/port-base > + unevaluatedProperties: false > + > + description: > + Input port for receiving CSI data from a CSIPHY. > + > + properties: > + endpoint: > + $ref: video-interfaces.yaml# > + unevaluatedProperties: false > + > + properties: > + data-lanes: > + minItems: 1 > + maxItems: 4 > + > + bus-type: > + enum: > + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY > + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY > + > + required: > + - data-lanes > + > +required: > + - compatible > + - reg > + - reg-names > + - clocks > + - clock-names > + - interrupts > + - interrupt-names > + - interconnects > + - interconnect-names > + - iommus > + - power-domains > + - power-domain-names > + - ports > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/qcom,gcc-sm6350.h> > + #include <dt-bindings/clock/qcom,sm6350-camcc.h> > + #include <dt-bindings/interconnect/qcom,icc.h> > + #include <dt-bindings/interconnect/qcom,sm6350.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/media/video-interfaces.h> > + #include <dt-bindings/power/qcom-rpmpd.h> > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + isp@acb3000 { > + compatible = "qcom,sm6350-camss"; > + > + reg = <0x0 0x0acb3000 0x0 0x1000>, > + <0x0 0x0acba000 0x0 0x1000>, > + <0x0 0x0acc1000 0x0 0x1000>, > + <0x0 0x0acc8000 0x0 0x1000>, > + <0x0 0x0ac65000 0x0 0x1000>, > + <0x0 0x0ac66000 0x0 0x1000>, > + <0x0 0x0ac67000 0x0 0x1000>, > + <0x0 0x0ac68000 0x0 0x1000>, > + <0x0 0x0acaf000 0x0 0x4000>, > + <0x0 0x0acb6000 0x0 0x4000>, > + <0x0 0x0acbd000 0x0 0x4000>, > + <0x0 0x0acc4000 0x0 0x4000>, > + <0x0 0x0ac18000 0x0 0x3000>, > + <0x0 0x0ac00000 0x0 0x6000>, > + <0x0 0x0ac10000 0x0 0x8000>, > + <0x0 0x0ac6f000 0x0 0x8000>, > + <0x0 0x0ac42000 0x0 0x4600>, > + <0x0 0x01fc0000 0x0 0x40000>, > + <0x0 0x0ac48000 0x0 0x1000>, > + <0x0 0x0ac40000 0x0 0x1000>, > + <0x0 0x0ac87000 0x0 0xa000>, > + <0x0 0x0ac52000 0x0 0x4000>, > + <0x0 0x0ac4e000 0x0 0x4000>, > + <0x0 0x0ac6b000 0x0 0xa00>; > + reg-names = "csid0", > + "csid1", > + "csid2", > + "csid_lite", > + "csiphy0", > + "csiphy1", > + "csiphy2", > + "csiphy3", > + "vfe0", > + "vfe1", > + "vfe2", > + "vfe_lite", > + "a5_csr", > + "a5_qgic", > + "a5_sierra", > + "bps", > + "camnoc", > + "core_top_csr_tcsr", > + "cpas_cdm", > + "cpas_top", > + "ipe", > + "jpeg_dma", > + "jpeg_enc", > + "lrme"; > + > + clocks = <&gcc GCC_CAMERA_AXI_CLK>, > + <&camcc CAMCC_SOC_AHB_CLK>, > + <&camcc CAMCC_CAMNOC_AXI_CLK>, > + <&camcc CAMCC_CORE_AHB_CLK>, > + <&camcc CAMCC_CPAS_AHB_CLK>, > + <&camcc CAMCC_CSIPHY0_CLK>, > + <&camcc CAMCC_CSI0PHYTIMER_CLK>, > + <&camcc CAMCC_CSIPHY1_CLK>, > + <&camcc CAMCC_CSI1PHYTIMER_CLK>, > + <&camcc CAMCC_CSIPHY2_CLK>, > + <&camcc CAMCC_CSI2PHYTIMER_CLK>, > + <&camcc CAMCC_CSIPHY3_CLK>, > + <&camcc CAMCC_CSI3PHYTIMER_CLK>, > + <&camcc CAMCC_IFE_0_AXI_CLK>, > + <&camcc CAMCC_IFE_0_CLK>, > + <&camcc CAMCC_IFE_0_CPHY_RX_CLK>, > + <&camcc CAMCC_IFE_0_CSID_CLK>, > + <&camcc CAMCC_IFE_1_AXI_CLK>, > + <&camcc CAMCC_IFE_1_CLK>, > + <&camcc CAMCC_IFE_1_CPHY_RX_CLK>, > + <&camcc CAMCC_IFE_1_CSID_CLK>, > + <&camcc CAMCC_IFE_2_AXI_CLK>, > + <&camcc CAMCC_IFE_2_CLK>, > + <&camcc CAMCC_IFE_2_CPHY_RX_CLK>, > + <&camcc CAMCC_IFE_2_CSID_CLK>, > + <&camcc CAMCC_IFE_LITE_CLK>, > + <&camcc CAMCC_IFE_LITE_CPHY_RX_CLK>, > + <&camcc CAMCC_IFE_LITE_CSID_CLK>, > + <&camcc CAMCC_BPS_CLK>, > + <&camcc CAMCC_BPS_AHB_CLK>, > + <&camcc CAMCC_BPS_AREG_CLK>, > + <&camcc CAMCC_BPS_AXI_CLK>, > + <&camcc CAMCC_ICP_CLK>, > + <&camcc CAMCC_IPE_0_CLK>, > + <&camcc CAMCC_IPE_0_AHB_CLK>, > + <&camcc CAMCC_IPE_0_AREG_CLK>, > + <&camcc CAMCC_IPE_0_AXI_CLK>, > + <&camcc CAMCC_JPEG_CLK>, > + <&camcc CAMCC_LRME_CLK>; > + clock-names = "cam_axi", > + "soc_ahb", > + "camnoc_axi", > + "core_ahb", > + "cpas_ahb", > + "csiphy0", > + "csiphy0_timer", > + "csiphy1", > + "csiphy1_timer", > + "csiphy2", > + "csiphy2_timer", > + "csiphy3", > + "csiphy3_timer", > + "vfe0_axi", > + "vfe0", > + "vfe0_cphy_rx", > + "vfe0_csid", > + "vfe1_axi", > + "vfe1", > + "vfe1_cphy_rx", > + "vfe1_csid", > + "vfe2_axi", > + "vfe2", > + "vfe2_cphy_rx", > + "vfe2_csid", > + "vfe_lite", > + "vfe_lite_cphy_rx", > + "vfe_lite_csid", > + "bps", > + "bps_ahb", > + "bps_areg", > + "bps_axi", > + "icp", > + "ipe0", > + "ipe0_ahb", > + "ipe0_areg", > + "ipe0_axi", > + "jpeg", > + "lrme"; > + > + interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 717 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 473 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 461 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 718 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 472 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 459 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 475 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 474 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 476 IRQ_TYPE_EDGE_RISING>; > + interrupt-names = "csid0", > + "csid1", > + "csid2", > + "csid_lite", > + "csiphy0", > + "csiphy1", > + "csiphy2", > + "csiphy3", > + "vfe0", > + "vfe1", > + "vfe2", > + "vfe_lite", > + "a5", > + "cpas", > + "cpas_cdm", > + "jpeg_dma", > + "jpeg_enc", > + "lrme"; > + > + interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY > + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, > + <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS > + &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>, > + <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ALWAYS > + &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>, > + <&mmss_noc MASTER_CAMNOC_ICP QCOM_ICC_TAG_ALWAYS > + &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>; > + interconnect-names = "ahb", > + "hf_mnoc", > + "sf_mnoc", > + "sf_icp_mnoc"; > + > + iommus = <&apps_smmu 0x820 0xc0>, > + <&apps_smmu 0x840 0x0>, > + <&apps_smmu 0x860 0xc0>, > + <&apps_smmu 0x880 0x0>, > + <&apps_smmu 0xc40 0x20>, > + <&apps_smmu 0xc60 0x20>, > + <&apps_smmu 0xc80 0x0>, > + <&apps_smmu 0xca2 0x0>, > + <&apps_smmu 0xcc0 0x20>, > + <&apps_smmu 0xce0 0x20>, > + <&apps_smmu 0xd00 0x20>, > + <&apps_smmu 0xd20 0x20>, > + <&apps_smmu 0xd40 0x20>, > + <&apps_smmu 0xd60 0x20>; > + > + power-domains = <&camcc IFE_0_GDSC>, > + <&camcc IFE_1_GDSC>, > + <&camcc IFE_2_GDSC>, > + <&camcc TITAN_TOP_GDSC>, > + <&camcc BPS_GDSC>, > + <&camcc IPE_0_GDSC>; > + power-domain-names = "ife0", > + "ife1", > + "ife2", > + "top", > + "bps", > + "ipe"; > + > + vdd-csiphy0-0p9-supply = <&vreg_l18a>; > + vdd-csiphy0-1p25-supply = <&vreg_l22a>; > + vdd-csiphy1-0p9-supply = <&vreg_l18a>; > + vdd-csiphy1-1p25-supply = <&vreg_l22a>; > + vdd-csiphy2-0p9-supply = <&vreg_l18a>; > + vdd-csiphy2-1p25-supply = <&vreg_l22a>; > + vdd-csiphy3-0p9-supply = <&vreg_l18a>; > + vdd-csiphy3-1p25-supply = <&vreg_l22a>; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + csiphy0_ep: endpoint { > + data-lanes = <0 1 2 3>; > + bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>; > + remote-endpoint = <&sensor_ep>; > + }; > + }; > + }; > + }; > + }; > Because CAMSS device tree nodes are far from being settled down, one more time I can just express my opinion that there is no good enough reason to describe all clocks and interconnects prematurely, anyway Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> -- Best wishes, Vladimir ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v4 1/3] dt-bindings: media: camss: Add qcom,sm6350-camss 2026-03-30 22:57 ` [PATCH v4 1/3] dt-bindings: media: camss: Add qcom,sm6350-camss Vladimir Zapolskiy @ 2026-03-31 6:38 ` Luca Weiss 2026-03-31 8:54 ` Bryan O'Donoghue 0 siblings, 1 reply; 15+ messages in thread From: Luca Weiss @ 2026-03-31 6:38 UTC (permalink / raw) To: Vladimir Zapolskiy, Luca Weiss, Bryan O'Donoghue, Robert Foss, Todor Tomov, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bryan O'Donoghue, Bjorn Andersson, Konrad Dybcio Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm, linux-media, devicetree, linux-kernel, Krzysztof Kozlowski On Tue Mar 31, 2026 at 12:57 AM CEST, Vladimir Zapolskiy wrote: > On 2/16/26 10:54, Luca Weiss wrote: >> Add bindings for the Camera Subsystem on the SM6350 SoC. >> >> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> >> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> >> --- >> .../bindings/media/qcom,sm6350-camss.yaml | 471 +++++++++++++++++++++ >> 1 file changed, 471 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/media/qcom,sm6350-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm6350-camss.yaml >> new file mode 100644 >> index 000000000000..96974d90d8c4 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/media/qcom,sm6350-camss.yaml >> @@ -0,0 +1,471 @@ >> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/media/qcom,sm6350-camss.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm SM6350 Camera Subsystem (CAMSS) >> + >> +maintainers: >> + - Luca Weiss <luca.weiss@fairphone.com> >> + >> +description: >> + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. >> + >> +properties: >> + compatible: >> + const: qcom,sm6350-camss >> + >> + reg: >> + maxItems: 24 >> + >> + reg-names: >> + items: >> + - const: csid0 >> + - const: csid1 >> + - const: csid2 >> + - const: csid_lite >> + - const: csiphy0 >> + - const: csiphy1 >> + - const: csiphy2 >> + - const: csiphy3 >> + - const: vfe0 >> + - const: vfe1 >> + - const: vfe2 >> + - const: vfe_lite >> + - const: a5_csr >> + - const: a5_qgic >> + - const: a5_sierra >> + - const: bps >> + - const: camnoc >> + - const: core_top_csr_tcsr >> + - const: cpas_cdm >> + - const: cpas_top >> + - const: ipe >> + - const: jpeg_dma >> + - const: jpeg_enc >> + - const: lrme >> + >> + clocks: >> + maxItems: 39 >> + >> + clock-names: >> + items: >> + - const: cam_axi >> + - const: soc_ahb >> + - const: camnoc_axi >> + - const: core_ahb >> + - const: cpas_ahb >> + - const: csiphy0 >> + - const: csiphy0_timer >> + - const: csiphy1 >> + - const: csiphy1_timer >> + - const: csiphy2 >> + - const: csiphy2_timer >> + - const: csiphy3 >> + - const: csiphy3_timer >> + - const: vfe0_axi >> + - const: vfe0 >> + - const: vfe0_cphy_rx >> + - const: vfe0_csid >> + - const: vfe1_axi >> + - const: vfe1 >> + - const: vfe1_cphy_rx >> + - const: vfe1_csid >> + - const: vfe2_axi >> + - const: vfe2 >> + - const: vfe2_cphy_rx >> + - const: vfe2_csid >> + - const: vfe_lite >> + - const: vfe_lite_cphy_rx >> + - const: vfe_lite_csid >> + - const: bps >> + - const: bps_ahb >> + - const: bps_areg >> + - const: bps_axi >> + - const: icp >> + - const: ipe0 >> + - const: ipe0_ahb >> + - const: ipe0_areg >> + - const: ipe0_axi >> + - const: jpeg >> + - const: lrme >> + >> + interrupts: >> + maxItems: 18 >> + >> + interrupt-names: >> + items: >> + - const: csid0 >> + - const: csid1 >> + - const: csid2 >> + - const: csid_lite >> + - const: csiphy0 >> + - const: csiphy1 >> + - const: csiphy2 >> + - const: csiphy3 >> + - const: vfe0 >> + - const: vfe1 >> + - const: vfe2 >> + - const: vfe_lite >> + - const: a5 >> + - const: cpas >> + - const: cpas_cdm >> + - const: jpeg_dma >> + - const: jpeg_enc >> + - const: lrme >> + >> + interconnects: >> + maxItems: 4 >> + >> + interconnect-names: >> + items: >> + - const: ahb >> + - const: hf_mnoc >> + - const: sf_mnoc >> + - const: sf_icp_mnoc >> + >> + iommus: >> + maxItems: 14 >> + >> + power-domains: >> + maxItems: 6 >> + >> + power-domain-names: >> + items: >> + - const: ife0 >> + - const: ife1 >> + - const: ife2 >> + - const: top >> + - const: bps >> + - const: ipe > > I've lost the content, why 'top' is somewhere in the middle? https://lore.kernel.org/linux-arm-msm/20260214-slick-ringtail-of-innovation-d8eecd@quoll/ > >> + >> + vdd-csiphy0-0p9-supply: >> + description: >> + Phandle to a 0.9V regulator supply to CSIPHY0. >> + >> + vdd-csiphy0-1p25-supply: >> + description: >> + Phandle to a 1.25V regulator supply to CSIPHY0. >> + >> + vdd-csiphy1-0p9-supply: >> + description: >> + Phandle to a 0.9V regulator supply to CSIPHY1. >> + >> + vdd-csiphy1-1p25-supply: >> + description: >> + Phandle to a 1.25V regulator supply to CSIPHY1. >> + >> + vdd-csiphy2-0p9-supply: >> + description: >> + Phandle to a 0.9V regulator supply to CSIPHY2. >> + >> + vdd-csiphy2-1p25-supply: >> + description: >> + Phandle to a 1.25V regulator supply to CSIPHY2. >> + >> + vdd-csiphy3-0p9-supply: >> + description: >> + Phandle to a 0.9V regulator supply to CSIPHY3. >> + >> + vdd-csiphy3-1p25-supply: >> + description: >> + Phandle to a 1.25V regulator supply to CSIPHY3. >> + >> + ports: >> + $ref: /schemas/graph.yaml#/properties/ports >> + >> + description: >> + CSI input ports. >> + >> + patternProperties: >> + "^port@[0-3]$": >> + $ref: /schemas/graph.yaml#/$defs/port-base >> + unevaluatedProperties: false >> + >> + description: >> + Input port for receiving CSI data from a CSIPHY. >> + >> + properties: >> + endpoint: >> + $ref: video-interfaces.yaml# >> + unevaluatedProperties: false >> + >> + properties: >> + data-lanes: >> + minItems: 1 >> + maxItems: 4 >> + >> + bus-type: >> + enum: >> + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY >> + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY >> + >> + required: >> + - data-lanes >> + >> +required: >> + - compatible >> + - reg >> + - reg-names >> + - clocks >> + - clock-names >> + - interrupts >> + - interrupt-names >> + - interconnects >> + - interconnect-names >> + - iommus >> + - power-domains >> + - power-domain-names >> + - ports >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + #include <dt-bindings/clock/qcom,gcc-sm6350.h> >> + #include <dt-bindings/clock/qcom,sm6350-camcc.h> >> + #include <dt-bindings/interconnect/qcom,icc.h> >> + #include <dt-bindings/interconnect/qcom,sm6350.h> >> + #include <dt-bindings/interrupt-controller/arm-gic.h> >> + #include <dt-bindings/media/video-interfaces.h> >> + #include <dt-bindings/power/qcom-rpmpd.h> >> + >> + soc { >> + #address-cells = <2>; >> + #size-cells = <2>; >> + >> + isp@acb3000 { >> + compatible = "qcom,sm6350-camss"; >> + >> + reg = <0x0 0x0acb3000 0x0 0x1000>, >> + <0x0 0x0acba000 0x0 0x1000>, >> + <0x0 0x0acc1000 0x0 0x1000>, >> + <0x0 0x0acc8000 0x0 0x1000>, >> + <0x0 0x0ac65000 0x0 0x1000>, >> + <0x0 0x0ac66000 0x0 0x1000>, >> + <0x0 0x0ac67000 0x0 0x1000>, >> + <0x0 0x0ac68000 0x0 0x1000>, >> + <0x0 0x0acaf000 0x0 0x4000>, >> + <0x0 0x0acb6000 0x0 0x4000>, >> + <0x0 0x0acbd000 0x0 0x4000>, >> + <0x0 0x0acc4000 0x0 0x4000>, >> + <0x0 0x0ac18000 0x0 0x3000>, >> + <0x0 0x0ac00000 0x0 0x6000>, >> + <0x0 0x0ac10000 0x0 0x8000>, >> + <0x0 0x0ac6f000 0x0 0x8000>, >> + <0x0 0x0ac42000 0x0 0x4600>, >> + <0x0 0x01fc0000 0x0 0x40000>, >> + <0x0 0x0ac48000 0x0 0x1000>, >> + <0x0 0x0ac40000 0x0 0x1000>, >> + <0x0 0x0ac87000 0x0 0xa000>, >> + <0x0 0x0ac52000 0x0 0x4000>, >> + <0x0 0x0ac4e000 0x0 0x4000>, >> + <0x0 0x0ac6b000 0x0 0xa00>; >> + reg-names = "csid0", >> + "csid1", >> + "csid2", >> + "csid_lite", >> + "csiphy0", >> + "csiphy1", >> + "csiphy2", >> + "csiphy3", >> + "vfe0", >> + "vfe1", >> + "vfe2", >> + "vfe_lite", >> + "a5_csr", >> + "a5_qgic", >> + "a5_sierra", >> + "bps", >> + "camnoc", >> + "core_top_csr_tcsr", >> + "cpas_cdm", >> + "cpas_top", >> + "ipe", >> + "jpeg_dma", >> + "jpeg_enc", >> + "lrme"; >> + >> + clocks = <&gcc GCC_CAMERA_AXI_CLK>, >> + <&camcc CAMCC_SOC_AHB_CLK>, >> + <&camcc CAMCC_CAMNOC_AXI_CLK>, >> + <&camcc CAMCC_CORE_AHB_CLK>, >> + <&camcc CAMCC_CPAS_AHB_CLK>, >> + <&camcc CAMCC_CSIPHY0_CLK>, >> + <&camcc CAMCC_CSI0PHYTIMER_CLK>, >> + <&camcc CAMCC_CSIPHY1_CLK>, >> + <&camcc CAMCC_CSI1PHYTIMER_CLK>, >> + <&camcc CAMCC_CSIPHY2_CLK>, >> + <&camcc CAMCC_CSI2PHYTIMER_CLK>, >> + <&camcc CAMCC_CSIPHY3_CLK>, >> + <&camcc CAMCC_CSI3PHYTIMER_CLK>, >> + <&camcc CAMCC_IFE_0_AXI_CLK>, >> + <&camcc CAMCC_IFE_0_CLK>, >> + <&camcc CAMCC_IFE_0_CPHY_RX_CLK>, >> + <&camcc CAMCC_IFE_0_CSID_CLK>, >> + <&camcc CAMCC_IFE_1_AXI_CLK>, >> + <&camcc CAMCC_IFE_1_CLK>, >> + <&camcc CAMCC_IFE_1_CPHY_RX_CLK>, >> + <&camcc CAMCC_IFE_1_CSID_CLK>, >> + <&camcc CAMCC_IFE_2_AXI_CLK>, >> + <&camcc CAMCC_IFE_2_CLK>, >> + <&camcc CAMCC_IFE_2_CPHY_RX_CLK>, >> + <&camcc CAMCC_IFE_2_CSID_CLK>, >> + <&camcc CAMCC_IFE_LITE_CLK>, >> + <&camcc CAMCC_IFE_LITE_CPHY_RX_CLK>, >> + <&camcc CAMCC_IFE_LITE_CSID_CLK>, >> + <&camcc CAMCC_BPS_CLK>, >> + <&camcc CAMCC_BPS_AHB_CLK>, >> + <&camcc CAMCC_BPS_AREG_CLK>, >> + <&camcc CAMCC_BPS_AXI_CLK>, >> + <&camcc CAMCC_ICP_CLK>, >> + <&camcc CAMCC_IPE_0_CLK>, >> + <&camcc CAMCC_IPE_0_AHB_CLK>, >> + <&camcc CAMCC_IPE_0_AREG_CLK>, >> + <&camcc CAMCC_IPE_0_AXI_CLK>, >> + <&camcc CAMCC_JPEG_CLK>, >> + <&camcc CAMCC_LRME_CLK>; >> + clock-names = "cam_axi", >> + "soc_ahb", >> + "camnoc_axi", >> + "core_ahb", >> + "cpas_ahb", >> + "csiphy0", >> + "csiphy0_timer", >> + "csiphy1", >> + "csiphy1_timer", >> + "csiphy2", >> + "csiphy2_timer", >> + "csiphy3", >> + "csiphy3_timer", >> + "vfe0_axi", >> + "vfe0", >> + "vfe0_cphy_rx", >> + "vfe0_csid", >> + "vfe1_axi", >> + "vfe1", >> + "vfe1_cphy_rx", >> + "vfe1_csid", >> + "vfe2_axi", >> + "vfe2", >> + "vfe2_cphy_rx", >> + "vfe2_csid", >> + "vfe_lite", >> + "vfe_lite_cphy_rx", >> + "vfe_lite_csid", >> + "bps", >> + "bps_ahb", >> + "bps_areg", >> + "bps_axi", >> + "icp", >> + "ipe0", >> + "ipe0_ahb", >> + "ipe0_areg", >> + "ipe0_axi", >> + "jpeg", >> + "lrme"; >> + >> + interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 717 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 473 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 461 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 718 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 472 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 459 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 475 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 474 IRQ_TYPE_EDGE_RISING>, >> + <GIC_SPI 476 IRQ_TYPE_EDGE_RISING>; >> + interrupt-names = "csid0", >> + "csid1", >> + "csid2", >> + "csid_lite", >> + "csiphy0", >> + "csiphy1", >> + "csiphy2", >> + "csiphy3", >> + "vfe0", >> + "vfe1", >> + "vfe2", >> + "vfe_lite", >> + "a5", >> + "cpas", >> + "cpas_cdm", >> + "jpeg_dma", >> + "jpeg_enc", >> + "lrme"; >> + >> + interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY >> + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, >> + <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS >> + &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>, >> + <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ALWAYS >> + &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>, >> + <&mmss_noc MASTER_CAMNOC_ICP QCOM_ICC_TAG_ALWAYS >> + &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>; >> + interconnect-names = "ahb", >> + "hf_mnoc", >> + "sf_mnoc", >> + "sf_icp_mnoc"; >> + >> + iommus = <&apps_smmu 0x820 0xc0>, >> + <&apps_smmu 0x840 0x0>, >> + <&apps_smmu 0x860 0xc0>, >> + <&apps_smmu 0x880 0x0>, >> + <&apps_smmu 0xc40 0x20>, >> + <&apps_smmu 0xc60 0x20>, >> + <&apps_smmu 0xc80 0x0>, >> + <&apps_smmu 0xca2 0x0>, >> + <&apps_smmu 0xcc0 0x20>, >> + <&apps_smmu 0xce0 0x20>, >> + <&apps_smmu 0xd00 0x20>, >> + <&apps_smmu 0xd20 0x20>, >> + <&apps_smmu 0xd40 0x20>, >> + <&apps_smmu 0xd60 0x20>; >> + >> + power-domains = <&camcc IFE_0_GDSC>, >> + <&camcc IFE_1_GDSC>, >> + <&camcc IFE_2_GDSC>, >> + <&camcc TITAN_TOP_GDSC>, >> + <&camcc BPS_GDSC>, >> + <&camcc IPE_0_GDSC>; >> + power-domain-names = "ife0", >> + "ife1", >> + "ife2", >> + "top", >> + "bps", >> + "ipe"; >> + >> + vdd-csiphy0-0p9-supply = <&vreg_l18a>; >> + vdd-csiphy0-1p25-supply = <&vreg_l22a>; >> + vdd-csiphy1-0p9-supply = <&vreg_l18a>; >> + vdd-csiphy1-1p25-supply = <&vreg_l22a>; >> + vdd-csiphy2-0p9-supply = <&vreg_l18a>; >> + vdd-csiphy2-1p25-supply = <&vreg_l22a>; >> + vdd-csiphy3-0p9-supply = <&vreg_l18a>; >> + vdd-csiphy3-1p25-supply = <&vreg_l22a>; >> + >> + ports { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + port@0 { >> + reg = <0>; >> + >> + csiphy0_ep: endpoint { >> + data-lanes = <0 1 2 3>; >> + bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>; >> + remote-endpoint = <&sensor_ep>; >> + }; >> + }; >> + }; >> + }; >> + }; >> > > Because CAMSS device tree nodes are far from being settled down, one > more time I can just express my opinion that there is no good enough > reason to describe all clocks and interconnects prematurely, anyway Would be nice if the camss maintainers were aligned so that contributors don't have to deal with mailing list conflicts over these fundamental things. It doesn't really make it fun to contribute if you get conflicting opinions from two people that you should both value the opinion of because they're maintainer. > Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Thanks! Regards Luca ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v4 1/3] dt-bindings: media: camss: Add qcom,sm6350-camss 2026-03-31 6:38 ` Luca Weiss @ 2026-03-31 8:54 ` Bryan O'Donoghue 0 siblings, 0 replies; 15+ messages in thread From: Bryan O'Donoghue @ 2026-03-31 8:54 UTC (permalink / raw) To: Luca Weiss, Vladimir Zapolskiy, Robert Foss, Todor Tomov, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bryan O'Donoghue, Bjorn Andersson, Konrad Dybcio Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm, linux-media, devicetree, linux-kernel, Krzysztof Kozlowski On 31/03/2026 07:38, Luca Weiss wrote: > Would be nice if the camss maintainers were aligned so that contributors > don't have to deal with mailing list conflicts over these fundamental > things. > > It doesn't really make it fun to contribute if you get conflicting > opinions from two people that you should both value the opinion of > because they're maintainer. Yeah you're right and very much appreciate all the very awesome work you personally do all over Qcom and PostmarketOS, which I don't think you get called out enough for. FWIW if we assume the proposed method of transitioning from legacy to new in Hamoa goes through, even bindings in the old format like this can benefit from new sub-nodes. --- bod ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v4 1/3] dt-bindings: media: camss: Add qcom,sm6350-camss [not found] ` <20260216-sm6350-camss-v4-1-b9df35f87edb@fairphone.com> 2026-03-30 22:57 ` [PATCH v4 1/3] dt-bindings: media: camss: Add qcom,sm6350-camss Vladimir Zapolskiy @ 2026-03-31 8:50 ` Bryan O'Donoghue 1 sibling, 0 replies; 15+ messages in thread From: Bryan O'Donoghue @ 2026-03-31 8:50 UTC (permalink / raw) To: Luca Weiss, Robert Foss, Todor Tomov, Vladimir Zapolskiy, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bryan O'Donoghue, Bjorn Andersson, Konrad Dybcio Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm, linux-media, devicetree, linux-kernel, Krzysztof Kozlowski On 16/02/2026 08:54, Luca Weiss wrote: > Add bindings for the Camera Subsystem on the SM6350 SoC. > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> > --- > .../bindings/media/qcom,sm6350-camss.yaml | 471 +++++++++++++++++++++ > 1 file changed, 471 insertions(+) > > diff --git a/Documentation/devicetree/bindings/media/qcom,sm6350-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm6350-camss.yaml > new file mode 100644 > index 000000000000..96974d90d8c4 > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/qcom,sm6350-camss.yaml > @@ -0,0 +1,471 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/media/qcom,sm6350-camss.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm SM6350 Camera Subsystem (CAMSS) > + > +maintainers: > + - Luca Weiss <luca.weiss@fairphone.com> > + > +description: > + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. > + > +properties: > + compatible: > + const: qcom,sm6350-camss > + > + reg: > + maxItems: 24 > + > + reg-names: > + items: > + - const: csid0 > + - const: csid1 > + - const: csid2 > + - const: csid_lite > + - const: csiphy0 > + - const: csiphy1 > + - const: csiphy2 > + - const: csiphy3 > + - const: vfe0 > + - const: vfe1 > + - const: vfe2 > + - const: vfe_lite > + - const: a5_csr > + - const: a5_qgic > + - const: a5_sierra > + - const: bps > + - const: camnoc > + - const: core_top_csr_tcsr > + - const: cpas_cdm > + - const: cpas_top > + - const: ipe > + - const: jpeg_dma > + - const: jpeg_enc > + - const: lrme > + > + clocks: > + maxItems: 39 > + > + clock-names: > + items: > + - const: cam_axi > + - const: soc_ahb > + - const: camnoc_axi > + - const: core_ahb > + - const: cpas_ahb > + - const: csiphy0 > + - const: csiphy0_timer > + - const: csiphy1 > + - const: csiphy1_timer > + - const: csiphy2 > + - const: csiphy2_timer > + - const: csiphy3 > + - const: csiphy3_timer > + - const: vfe0_axi > + - const: vfe0 > + - const: vfe0_cphy_rx > + - const: vfe0_csid > + - const: vfe1_axi > + - const: vfe1 > + - const: vfe1_cphy_rx > + - const: vfe1_csid > + - const: vfe2_axi > + - const: vfe2 > + - const: vfe2_cphy_rx > + - const: vfe2_csid > + - const: vfe_lite > + - const: vfe_lite_cphy_rx > + - const: vfe_lite_csid > + - const: bps > + - const: bps_ahb > + - const: bps_areg > + - const: bps_axi > + - const: icp > + - const: ipe0 > + - const: ipe0_ahb > + - const: ipe0_areg > + - const: ipe0_axi > + - const: jpeg > + - const: lrme > + > + interrupts: > + maxItems: 18 > + > + interrupt-names: > + items: > + - const: csid0 > + - const: csid1 > + - const: csid2 > + - const: csid_lite > + - const: csiphy0 > + - const: csiphy1 > + - const: csiphy2 > + - const: csiphy3 > + - const: vfe0 > + - const: vfe1 > + - const: vfe2 > + - const: vfe_lite > + - const: a5 > + - const: cpas > + - const: cpas_cdm > + - const: jpeg_dma > + - const: jpeg_enc > + - const: lrme > + > + interconnects: > + maxItems: 4 > + > + interconnect-names: > + items: > + - const: ahb > + - const: hf_mnoc > + - const: sf_mnoc > + - const: sf_icp_mnoc > + > + iommus: > + maxItems: 14 > + > + power-domains: > + maxItems: 6 > + > + power-domain-names: > + items: > + - const: ife0 > + - const: ife1 > + - const: ife2 > + - const: top > + - const: bps > + - const: ipe > + > + vdd-csiphy0-0p9-supply: > + description: > + Phandle to a 0.9V regulator supply to CSIPHY0. > + > + vdd-csiphy0-1p25-supply: > + description: > + Phandle to a 1.25V regulator supply to CSIPHY0. > + > + vdd-csiphy1-0p9-supply: > + description: > + Phandle to a 0.9V regulator supply to CSIPHY1. > + > + vdd-csiphy1-1p25-supply: > + description: > + Phandle to a 1.25V regulator supply to CSIPHY1. > + > + vdd-csiphy2-0p9-supply: > + description: > + Phandle to a 0.9V regulator supply to CSIPHY2. > + > + vdd-csiphy2-1p25-supply: > + description: > + Phandle to a 1.25V regulator supply to CSIPHY2. > + > + vdd-csiphy3-0p9-supply: > + description: > + Phandle to a 0.9V regulator supply to CSIPHY3. > + > + vdd-csiphy3-1p25-supply: > + description: > + Phandle to a 1.25V regulator supply to CSIPHY3. > + > + ports: > + $ref: /schemas/graph.yaml#/properties/ports > + > + description: > + CSI input ports. > + > + patternProperties: > + "^port@[0-3]$": > + $ref: /schemas/graph.yaml#/$defs/port-base > + unevaluatedProperties: false > + > + description: > + Input port for receiving CSI data from a CSIPHY. > + > + properties: > + endpoint: > + $ref: video-interfaces.yaml# > + unevaluatedProperties: false > + > + properties: > + data-lanes: > + minItems: 1 > + maxItems: 4 > + > + bus-type: > + enum: > + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY > + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY > + > + required: > + - data-lanes > + > +required: > + - compatible > + - reg > + - reg-names > + - clocks > + - clock-names > + - interrupts > + - interrupt-names > + - interconnects > + - interconnect-names > + - iommus > + - power-domains > + - power-domain-names > + - ports > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/qcom,gcc-sm6350.h> > + #include <dt-bindings/clock/qcom,sm6350-camcc.h> > + #include <dt-bindings/interconnect/qcom,icc.h> > + #include <dt-bindings/interconnect/qcom,sm6350.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/media/video-interfaces.h> > + #include <dt-bindings/power/qcom-rpmpd.h> > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + isp@acb3000 { > + compatible = "qcom,sm6350-camss"; > + > + reg = <0x0 0x0acb3000 0x0 0x1000>, > + <0x0 0x0acba000 0x0 0x1000>, > + <0x0 0x0acc1000 0x0 0x1000>, > + <0x0 0x0acc8000 0x0 0x1000>, > + <0x0 0x0ac65000 0x0 0x1000>, > + <0x0 0x0ac66000 0x0 0x1000>, > + <0x0 0x0ac67000 0x0 0x1000>, > + <0x0 0x0ac68000 0x0 0x1000>, > + <0x0 0x0acaf000 0x0 0x4000>, > + <0x0 0x0acb6000 0x0 0x4000>, > + <0x0 0x0acbd000 0x0 0x4000>, > + <0x0 0x0acc4000 0x0 0x4000>, > + <0x0 0x0ac18000 0x0 0x3000>, > + <0x0 0x0ac00000 0x0 0x6000>, > + <0x0 0x0ac10000 0x0 0x8000>, > + <0x0 0x0ac6f000 0x0 0x8000>, > + <0x0 0x0ac42000 0x0 0x4600>, > + <0x0 0x01fc0000 0x0 0x40000>, > + <0x0 0x0ac48000 0x0 0x1000>, > + <0x0 0x0ac40000 0x0 0x1000>, > + <0x0 0x0ac87000 0x0 0xa000>, > + <0x0 0x0ac52000 0x0 0x4000>, > + <0x0 0x0ac4e000 0x0 0x4000>, > + <0x0 0x0ac6b000 0x0 0xa00>; > + reg-names = "csid0", > + "csid1", > + "csid2", > + "csid_lite", > + "csiphy0", > + "csiphy1", > + "csiphy2", > + "csiphy3", > + "vfe0", > + "vfe1", > + "vfe2", > + "vfe_lite", > + "a5_csr", > + "a5_qgic", > + "a5_sierra", > + "bps", > + "camnoc", > + "core_top_csr_tcsr", > + "cpas_cdm", > + "cpas_top", > + "ipe", > + "jpeg_dma", > + "jpeg_enc", > + "lrme"; > + > + clocks = <&gcc GCC_CAMERA_AXI_CLK>, > + <&camcc CAMCC_SOC_AHB_CLK>, > + <&camcc CAMCC_CAMNOC_AXI_CLK>, > + <&camcc CAMCC_CORE_AHB_CLK>, > + <&camcc CAMCC_CPAS_AHB_CLK>, > + <&camcc CAMCC_CSIPHY0_CLK>, > + <&camcc CAMCC_CSI0PHYTIMER_CLK>, > + <&camcc CAMCC_CSIPHY1_CLK>, > + <&camcc CAMCC_CSI1PHYTIMER_CLK>, > + <&camcc CAMCC_CSIPHY2_CLK>, > + <&camcc CAMCC_CSI2PHYTIMER_CLK>, > + <&camcc CAMCC_CSIPHY3_CLK>, > + <&camcc CAMCC_CSI3PHYTIMER_CLK>, > + <&camcc CAMCC_IFE_0_AXI_CLK>, > + <&camcc CAMCC_IFE_0_CLK>, > + <&camcc CAMCC_IFE_0_CPHY_RX_CLK>, > + <&camcc CAMCC_IFE_0_CSID_CLK>, > + <&camcc CAMCC_IFE_1_AXI_CLK>, > + <&camcc CAMCC_IFE_1_CLK>, > + <&camcc CAMCC_IFE_1_CPHY_RX_CLK>, > + <&camcc CAMCC_IFE_1_CSID_CLK>, > + <&camcc CAMCC_IFE_2_AXI_CLK>, > + <&camcc CAMCC_IFE_2_CLK>, > + <&camcc CAMCC_IFE_2_CPHY_RX_CLK>, > + <&camcc CAMCC_IFE_2_CSID_CLK>, > + <&camcc CAMCC_IFE_LITE_CLK>, > + <&camcc CAMCC_IFE_LITE_CPHY_RX_CLK>, > + <&camcc CAMCC_IFE_LITE_CSID_CLK>, > + <&camcc CAMCC_BPS_CLK>, > + <&camcc CAMCC_BPS_AHB_CLK>, > + <&camcc CAMCC_BPS_AREG_CLK>, > + <&camcc CAMCC_BPS_AXI_CLK>, > + <&camcc CAMCC_ICP_CLK>, > + <&camcc CAMCC_IPE_0_CLK>, > + <&camcc CAMCC_IPE_0_AHB_CLK>, > + <&camcc CAMCC_IPE_0_AREG_CLK>, > + <&camcc CAMCC_IPE_0_AXI_CLK>, > + <&camcc CAMCC_JPEG_CLK>, > + <&camcc CAMCC_LRME_CLK>; > + clock-names = "cam_axi", > + "soc_ahb", > + "camnoc_axi", > + "core_ahb", > + "cpas_ahb", > + "csiphy0", > + "csiphy0_timer", > + "csiphy1", > + "csiphy1_timer", > + "csiphy2", > + "csiphy2_timer", > + "csiphy3", > + "csiphy3_timer", > + "vfe0_axi", > + "vfe0", > + "vfe0_cphy_rx", > + "vfe0_csid", > + "vfe1_axi", > + "vfe1", > + "vfe1_cphy_rx", > + "vfe1_csid", > + "vfe2_axi", > + "vfe2", > + "vfe2_cphy_rx", > + "vfe2_csid", > + "vfe_lite", > + "vfe_lite_cphy_rx", > + "vfe_lite_csid", > + "bps", > + "bps_ahb", > + "bps_areg", > + "bps_axi", > + "icp", > + "ipe0", > + "ipe0_ahb", > + "ipe0_areg", > + "ipe0_axi", > + "jpeg", > + "lrme"; > + > + interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 717 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 473 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 461 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 718 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 472 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 459 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 475 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 474 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 476 IRQ_TYPE_EDGE_RISING>; > + interrupt-names = "csid0", > + "csid1", > + "csid2", > + "csid_lite", > + "csiphy0", > + "csiphy1", > + "csiphy2", > + "csiphy3", > + "vfe0", > + "vfe1", > + "vfe2", > + "vfe_lite", > + "a5", > + "cpas", > + "cpas_cdm", > + "jpeg_dma", > + "jpeg_enc", > + "lrme"; > + > + interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY > + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, > + <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS > + &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>, > + <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ALWAYS > + &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>, > + <&mmss_noc MASTER_CAMNOC_ICP QCOM_ICC_TAG_ALWAYS > + &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>; > + interconnect-names = "ahb", > + "hf_mnoc", > + "sf_mnoc", > + "sf_icp_mnoc"; > + > + iommus = <&apps_smmu 0x820 0xc0>, > + <&apps_smmu 0x840 0x0>, > + <&apps_smmu 0x860 0xc0>, > + <&apps_smmu 0x880 0x0>, > + <&apps_smmu 0xc40 0x20>, > + <&apps_smmu 0xc60 0x20>, > + <&apps_smmu 0xc80 0x0>, > + <&apps_smmu 0xca2 0x0>, > + <&apps_smmu 0xcc0 0x20>, > + <&apps_smmu 0xce0 0x20>, > + <&apps_smmu 0xd00 0x20>, > + <&apps_smmu 0xd20 0x20>, > + <&apps_smmu 0xd40 0x20>, > + <&apps_smmu 0xd60 0x20>; > + > + power-domains = <&camcc IFE_0_GDSC>, > + <&camcc IFE_1_GDSC>, > + <&camcc IFE_2_GDSC>, > + <&camcc TITAN_TOP_GDSC>, > + <&camcc BPS_GDSC>, > + <&camcc IPE_0_GDSC>; > + power-domain-names = "ife0", > + "ife1", > + "ife2", > + "top", > + "bps", > + "ipe"; > + > + vdd-csiphy0-0p9-supply = <&vreg_l18a>; > + vdd-csiphy0-1p25-supply = <&vreg_l22a>; > + vdd-csiphy1-0p9-supply = <&vreg_l18a>; > + vdd-csiphy1-1p25-supply = <&vreg_l22a>; > + vdd-csiphy2-0p9-supply = <&vreg_l18a>; > + vdd-csiphy2-1p25-supply = <&vreg_l22a>; > + vdd-csiphy3-0p9-supply = <&vreg_l18a>; > + vdd-csiphy3-1p25-supply = <&vreg_l22a>; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + csiphy0_ep: endpoint { > + data-lanes = <0 1 2 3>; > + bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>; > + remote-endpoint = <&sensor_ep>; > + }; > + }; > + }; > + }; > + }; > > -- > 2.53.0 > Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> ^ permalink raw reply [flat|nested] 15+ messages in thread
[parent not found: <20260216-sm6350-camss-v4-2-b9df35f87edb@fairphone.com>]
* Re: [PATCH v4 2/3] media: qcom: camss: Add SM6350 support [not found] ` <20260216-sm6350-camss-v4-2-b9df35f87edb@fairphone.com> @ 2026-03-31 13:20 ` Vladimir Zapolskiy 0 siblings, 0 replies; 15+ messages in thread From: Vladimir Zapolskiy @ 2026-03-31 13:20 UTC (permalink / raw) To: Luca Weiss, Bryan O'Donoghue, Robert Foss, Todor Tomov, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bryan O'Donoghue, Bjorn Andersson, Konrad Dybcio Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm, linux-media, devicetree, linux-kernel On 2/16/26 10:54, Luca Weiss wrote: > Add the necessary support for CAMSS on the SM6350 SoC. > > Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> -- Best wishes, Vladimir ^ permalink raw reply [flat|nested] 15+ messages in thread
[parent not found: <20260216-sm6350-camss-v4-3-b9df35f87edb@fairphone.com>]
* Re: [PATCH v4 3/3] arm64: dts: qcom: sm6350: Add CAMSS node [not found] ` <20260216-sm6350-camss-v4-3-b9df35f87edb@fairphone.com> @ 2026-03-31 13:29 ` Vladimir Zapolskiy 0 siblings, 0 replies; 15+ messages in thread From: Vladimir Zapolskiy @ 2026-03-31 13:29 UTC (permalink / raw) To: Luca Weiss Cc: Bryan O'Donoghue, Robert Foss, ~postmarketos/upstreaming, phone-devel, linux-arm-msm, linux-media, devicetree, linux-kernel, Todor Tomov, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bryan O'Donoghue, Bjorn Andersson, Konrad Dybcio On 2/16/26 10:54, Luca Weiss wrote: > Add a node for the CAMSS on the SM6350 SoC. > > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> > --- > arch/arm64/boot/dts/qcom/sm6350.dtsi | 233 +++++++++++++++++++++++++++++++++++ > 1 file changed, 233 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi > index 9f9b9f9af0da..9ff9508c5ce6 100644 > --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi > @@ -2161,6 +2161,239 @@ cci1_i2c0: i2c-bus@0 { > /* SM6350 seems to have cci1_i2c1 on gpio2 & gpio3 but unused downstream */ > }; > > + camss: isp@acb3000 { > + compatible = "qcom,sm6350-camss"; > + > + reg = <0x0 0x0acb3000 0x0 0x1000>, > + <0x0 0x0acba000 0x0 0x1000>, > + <0x0 0x0acc1000 0x0 0x1000>, > + <0x0 0x0acc8000 0x0 0x1000>, > + <0x0 0x0ac65000 0x0 0x1000>, > + <0x0 0x0ac66000 0x0 0x1000>, > + <0x0 0x0ac67000 0x0 0x1000>, > + <0x0 0x0ac68000 0x0 0x1000>, > + <0x0 0x0acaf000 0x0 0x4000>, > + <0x0 0x0acb6000 0x0 0x4000>, > + <0x0 0x0acbd000 0x0 0x4000>, > + <0x0 0x0acc4000 0x0 0x4000>, > + <0x0 0x0ac18000 0x0 0x3000>, > + <0x0 0x0ac00000 0x0 0x6000>, > + <0x0 0x0ac10000 0x0 0x8000>, > + <0x0 0x0ac6f000 0x0 0x8000>, > + <0x0 0x0ac42000 0x0 0x4600>, > + <0x0 0x01fc0000 0x0 0x40000>, I notice that this memory range is very distant, can somebody with the access to the specs confirm that it is a part of CAMSS IP? > + <0x0 0x0ac48000 0x0 0x1000>, > + <0x0 0x0ac40000 0x0 0x1000>, > + <0x0 0x0ac87000 0x0 0xa000>, > + <0x0 0x0ac52000 0x0 0x4000>, > + <0x0 0x0ac4e000 0x0 0x4000>, > + <0x0 0x0ac6b000 0x0 0xa00>; > + reg-names = "csid0", > + "csid1", > + "csid2", > + "csid_lite", > + "csiphy0", > + "csiphy1", > + "csiphy2", > + "csiphy3", > + "vfe0", > + "vfe1", > + "vfe2", > + "vfe_lite", > + "a5_csr", > + "a5_qgic", > + "a5_sierra", > + "bps", > + "camnoc", > + "core_top_csr_tcsr", Looking at the memory map I have a feeling that this "core_top_csr_tcsr" is not a natural part of CAMSS IPs, it should be clarified by someone else. > + "cpas_cdm", > + "cpas_top", > + "ipe", > + "jpeg_dma", > + "jpeg_enc", > + "lrme"; > + The .dtsi change strictly follows the dt bindings description, won't repeat previously given concerns here, so Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> -- Best wishes, Vladimir ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v4 0/3] Add CAMSS support for SM6350 [not found] <20260216-sm6350-camss-v4-0-b9df35f87edb@fairphone.com> ` (3 preceding siblings ...) [not found] ` <20260216-sm6350-camss-v4-3-b9df35f87edb@fairphone.com> @ 2026-05-15 11:09 ` Konrad Dybcio 4 siblings, 0 replies; 15+ messages in thread From: Konrad Dybcio @ 2026-05-15 11:09 UTC (permalink / raw) To: Luca Weiss, Bryan O'Donoghue, Robert Foss, Todor Tomov, Vladimir Zapolskiy, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bryan O'Donoghue, Bjorn Andersson, Konrad Dybcio Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm, linux-media, devicetree, linux-kernel, Krzysztof Kozlowski On 2/16/26 9:54 AM, Luca Weiss wrote: > Add bindings, driver and dts to support the Camera Subsystem on the > SM6350 SoC. > > These patches were tested on a Fairphone 4 smartphone with WIP sensor > drivers (Sony IMX576 and IMX582), the camera pipeline works properly as > far as I can tell. > > Though when stopping the camera stream, the following clock warning > appears in dmesg. But it does not interfere with any functionality, > starting and stopping the stream works and debugcc is showing 426.4 MHz > while the clock is on, and 'off' while it's off. > > Any suggestion how to fix this, is appreciated. https://lore.kernel.org/linux-arm-msm/caa870e2-3795-40bc-9f0e-c93e313c8c6e@oss.qualcomm.com/ Could you check the ordering between disabling that clock and calling icc_set(.., 0, 0)? Or perhaps we have another missing icc path somewhere? Konrad ^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2026-05-15 11:09 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
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[not found] <20260216-sm6350-camss-v4-0-b9df35f87edb@fairphone.com>
2026-03-30 22:49 ` [PATCH v4 0/3] Add CAMSS support for SM6350 Vladimir Zapolskiy
2026-04-03 8:09 ` Luca Weiss
2026-04-03 10:09 ` Vladimir Zapolskiy
2026-04-03 15:07 ` Bryan O'Donoghue
2026-05-01 10:12 ` Luca Weiss
2026-05-01 22:32 ` Bryan O'Donoghue
2026-05-04 7:14 ` Luca Weiss
2026-05-04 11:18 ` Bryan O'Donoghue
[not found] ` <20260216-sm6350-camss-v4-1-b9df35f87edb@fairphone.com>
2026-03-30 22:57 ` [PATCH v4 1/3] dt-bindings: media: camss: Add qcom,sm6350-camss Vladimir Zapolskiy
2026-03-31 6:38 ` Luca Weiss
2026-03-31 8:54 ` Bryan O'Donoghue
2026-03-31 8:50 ` Bryan O'Donoghue
[not found] ` <20260216-sm6350-camss-v4-2-b9df35f87edb@fairphone.com>
2026-03-31 13:20 ` [PATCH v4 2/3] media: qcom: camss: Add SM6350 support Vladimir Zapolskiy
[not found] ` <20260216-sm6350-camss-v4-3-b9df35f87edb@fairphone.com>
2026-03-31 13:29 ` [PATCH v4 3/3] arm64: dts: qcom: sm6350: Add CAMSS node Vladimir Zapolskiy
2026-05-15 11:09 ` [PATCH v4 0/3] Add CAMSS support for SM6350 Konrad Dybcio
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