[PATCH 0/3] drm/omap: Support for dispc memory bandwidth limit

[PATCH 0/3] drm/omap: Support for dispc memory bandwidth limit

[Peter Ujfalusi]

Hi,

This series will add simple memory bandwidth limit support to reject modes
which, if used with one plane in full size would fail the limit.

Regards,
Peter
---
Peter Ujfalusi (3):
  dt-bindings: display/ti: Add optional property to set memory bandwidth
    limit
  drm/omap: dss: Add support for reporting memory bandwidth limitation
  drm/omap: Filter displays mode based on bandwidth limit

 .../devicetree/bindings/display/ti/ti,dra7-dss.txt |  5 +++++
 .../bindings/display/ti/ti,omap2-dss.txt           |  4 ++++
 .../bindings/display/ti/ti,omap3-dss.txt           |  4 ++++
 .../bindings/display/ti/ti,omap4-dss.txt           |  4 ++++
 .../bindings/display/ti/ti,omap5-dss.txt           |  4 ++++
 drivers/gpu/drm/omapdrm/dss/dispc.c                | 13 ++++++++++++
 drivers/gpu/drm/omapdrm/dss/omapdss.h              |  2 ++
 drivers/gpu/drm/omapdrm/omap_connector.c           | 24 ++++++++++++++++++++++
 drivers/gpu/drm/omapdrm/omap_drv.c                 |  5 +++++
 drivers/gpu/drm/omapdrm/omap_drv.h                 |  3 +++
 10 files changed, 68 insertions(+)

-- 
Peter

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

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[PATCH 1/3] dt-bindings: display/ti: Add optional property to set memory bandwidth limit

[Peter Ujfalusi]

max-memory-bandwidth can be used to specify the maximum bandwidth dispc
can use when reading display data from main memory.

In some SoC (am437x for example) we have memory bandwidth limitation
which causes underflow in the display subsystem.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 Documentation/devicetree/bindings/display/ti/ti,dra7-dss.txt  | 5 +++++
 Documentation/devicetree/bindings/display/ti/ti,omap2-dss.txt | 4 ++++
 Documentation/devicetree/bindings/display/ti/ti,omap3-dss.txt | 4 ++++
 Documentation/devicetree/bindings/display/ti/ti,omap4-dss.txt | 4 ++++
 Documentation/devicetree/bindings/display/ti/ti,omap5-dss.txt | 4 ++++
 5 files changed, 21 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/ti/ti,dra7-dss.txt b/Documentation/devicetree/bindings/display/ti/ti,dra7-dss.txt
index c30f9ec189ed..91279f1060fe 100644
--- a/Documentation/devicetree/bindings/display/ti/ti,dra7-dss.txt
+++ b/Documentation/devicetree/bindings/display/ti/ti,dra7-dss.txt
@@ -47,6 +47,11 @@ Required properties:
 - clocks: handle to fclk
 - clock-names: "fck"
 
+Optional properties:
+- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
+			in bytes per second
+
+
 HDMI
 ----
 
diff --git a/Documentation/devicetree/bindings/display/ti/ti,omap2-dss.txt b/Documentation/devicetree/bindings/display/ti/ti,omap2-dss.txt
index afcd5a86c6a4..ee867c4d1152 100644
--- a/Documentation/devicetree/bindings/display/ti/ti,omap2-dss.txt
+++ b/Documentation/devicetree/bindings/display/ti/ti,omap2-dss.txt
@@ -28,6 +28,10 @@ Required properties:
 - ti,hwmods: "dss_dispc"
 - interrupts: the DISPC interrupt
 
+Optional properties:
+- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
+			in bytes per second
+
 
 RFBI
 ----
diff --git a/Documentation/devicetree/bindings/display/ti/ti,omap3-dss.txt b/Documentation/devicetree/bindings/display/ti/ti,omap3-dss.txt
index dc66e1447c31..cd02516a40b6 100644
--- a/Documentation/devicetree/bindings/display/ti/ti,omap3-dss.txt
+++ b/Documentation/devicetree/bindings/display/ti/ti,omap3-dss.txt
@@ -37,6 +37,10 @@ Required properties:
 - clocks: handle to fclk
 - clock-names: "fck"
 
+Optional properties:
+- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
+			in bytes per second
+
 
 RFBI
 ----
diff --git a/Documentation/devicetree/bindings/display/ti/ti,omap4-dss.txt b/Documentation/devicetree/bindings/display/ti/ti,omap4-dss.txt
index bc624db8888d..0f85f6b3a5a8 100644
--- a/Documentation/devicetree/bindings/display/ti/ti,omap4-dss.txt
+++ b/Documentation/devicetree/bindings/display/ti/ti,omap4-dss.txt
@@ -36,6 +36,10 @@ Required properties:
 - clocks: handle to fclk
 - clock-names: "fck"
 
+Optional properties:
+- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
+			in bytes per second
+
 
 RFBI
 ----
diff --git a/Documentation/devicetree/bindings/display/ti/ti,omap5-dss.txt b/Documentation/devicetree/bindings/display/ti/ti,omap5-dss.txt
index 118a486c47bb..20861218649f 100644
--- a/Documentation/devicetree/bindings/display/ti/ti,omap5-dss.txt
+++ b/Documentation/devicetree/bindings/display/ti/ti,omap5-dss.txt
@@ -36,6 +36,10 @@ Required properties:
 - clocks: handle to fclk
 - clock-names: "fck"
 
+Optional properties:
+- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
+			in bytes per second
+
 
 RFBI
 ----
-- 
Peter

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

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Re: [PATCH 1/3] dt-bindings: display/ti: Add optional property to set memory bandwidth limit

[Rob Herring]

On Fri, Oct 20, 2017 at 04:12:56PM +0300, Peter Ujfalusi wrote:
> max-memory-bandwidth can be used to specify the maximum bandwidth dispc
> can use when reading display data from main memory.
> 
> In some SoC (am437x for example) we have memory bandwidth limitation
> which causes underflow in the display subsystem.
> 
> Signed-off-by: Peter Ujfalusi <peter.ujfalusi-l0cyMroinI0@public.gmane.org>
> ---
>  Documentation/devicetree/bindings/display/ti/ti,dra7-dss.txt  | 5 +++++
>  Documentation/devicetree/bindings/display/ti/ti,omap2-dss.txt | 4 ++++
>  Documentation/devicetree/bindings/display/ti/ti,omap3-dss.txt | 4 ++++
>  Documentation/devicetree/bindings/display/ti/ti,omap4-dss.txt | 4 ++++
>  Documentation/devicetree/bindings/display/ti/ti,omap5-dss.txt | 4 ++++
>  5 files changed, 21 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/display/ti/ti,dra7-dss.txt b/Documentation/devicetree/bindings/display/ti/ti,dra7-dss.txt
> index c30f9ec189ed..91279f1060fe 100644
> --- a/Documentation/devicetree/bindings/display/ti/ti,dra7-dss.txt
> +++ b/Documentation/devicetree/bindings/display/ti/ti,dra7-dss.txt
> @@ -47,6 +47,11 @@ Required properties:
>  - clocks: handle to fclk
>  - clock-names: "fck"
>  
> +Optional properties:
> +- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
> +			in bytes per second

Can we move this to a common location since we already have the same 
prop for ARM pl11x.

Rob
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Re: [PATCH 1/3] dt-bindings: display/ti: Add optional property to set memory bandwidth limit

[Peter Ujfalusi]

Rob,

On 10/27/2017 05:27 AM, Rob Herring wrote:
> On Fri, Oct 20, 2017 at 04:12:56PM +0300, Peter Ujfalusi wrote:
>> max-memory-bandwidth can be used to specify the maximum bandwidth dispc
>> can use when reading display data from main memory.
>>
>> In some SoC (am437x for example) we have memory bandwidth limitation
>> which causes underflow in the display subsystem.
>>
>> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
>> ---
>>  Documentation/devicetree/bindings/display/ti/ti,dra7-dss.txt  | 5 +++++
>>  Documentation/devicetree/bindings/display/ti/ti,omap2-dss.txt | 4 ++++
>>  Documentation/devicetree/bindings/display/ti/ti,omap3-dss.txt | 4 ++++
>>  Documentation/devicetree/bindings/display/ti/ti,omap4-dss.txt | 4 ++++
>>  Documentation/devicetree/bindings/display/ti/ti,omap5-dss.txt | 4 ++++
>>  5 files changed, 21 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/display/ti/ti,dra7-dss.txt b/Documentation/devicetree/bindings/display/ti/ti,dra7-dss.txt
>> index c30f9ec189ed..91279f1060fe 100644
>> --- a/Documentation/devicetree/bindings/display/ti/ti,dra7-dss.txt
>> +++ b/Documentation/devicetree/bindings/display/ti/ti,dra7-dss.txt
>> @@ -47,6 +47,11 @@ Required properties:
>>  - clocks: handle to fclk
>>  - clock-names: "fck"
>>  
>> +Optional properties:
>> +- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
>> +			in bytes per second
> 
> Can we move this to a common location since we already have the same 
> prop for ARM pl11x.

This is why I used the same string for ti,* as I saw that pl11x have it
documented (the driver is not supporting it afaik, it is in the TODO).

I don't see any generic documentation for Display, not sure what would be the
best place for things like this.

While it is true that memory bandwidth limit can be a generic property, but it
might (not sure about it) can apply to different interfaces among different
vendors. The device specific documentation should either way need to mention
that it supports memory bandwidth limitation or not.

-- 
Péter

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
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[PATCH 2/3] drm/omap: dss: Add support for reporting memory bandwidth limitation

[Peter Ujfalusi]

The get_memory_bandwidth_limit() in dispc_ops can be used to query the
memory bandwidth limit of dispc by upper layers.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi-l0cyMroinI0@public.gmane.org>
---
 drivers/gpu/drm/omapdrm/dss/dispc.c   | 13 +++++++++++++
 drivers/gpu/drm/omapdrm/dss/omapdss.h |  2 ++
 2 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c
index 0f4fdb221498..90f9ad89af0d 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -4325,6 +4325,17 @@ static void dispc_free_irq(void *dev_id)
 	dispc.user_data = NULL;
 }
 
+static u32 dispc_get_memory_bandwidth_limit(void)
+{
+	u32 limit = 0;
+
+	/* Optional maximum memory bandwidth */
+	of_property_read_u32(dispc.pdev->dev.of_node, "max-memory-bandwidth",
+			     &limit);
+
+	return limit;
+}
+
 /*
  * Workaround for errata i734 in DSS dispc
  *  - LCD1 Gamma Correction Is Not Working When GFX Pipe Is Disabled
@@ -4497,6 +4508,8 @@ static const struct dispc_ops dispc_ops = {
 	.get_num_ovls = dispc_get_num_ovls,
 	.get_num_mgrs = dispc_get_num_mgrs,
 
+	.get_memory_bandwidth_limit = dispc_get_memory_bandwidth_limit,
+
 	.mgr_enable = dispc_mgr_enable,
 	.mgr_is_enabled = dispc_mgr_is_enabled,
 	.mgr_get_vsync_irq = dispc_mgr_get_vsync_irq,
diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h
index 0bc6669d56f0..f30b3c09e1ba 100644
--- a/drivers/gpu/drm/omapdrm/dss/omapdss.h
+++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h
@@ -692,6 +692,8 @@ struct dispc_ops {
 	int (*get_num_ovls)(void);
 	int (*get_num_mgrs)(void);
 
+	u32 (*get_memory_bandwidth_limit)(void);
+
 	void (*mgr_enable)(enum omap_channel channel, bool enable);
 	bool (*mgr_is_enabled)(enum omap_channel channel);
 	u32 (*mgr_get_vsync_irq)(enum omap_channel channel);
-- 
Peter

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

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[PATCH 3/3] drm/omap: Filter displays mode based on bandwidth limit

[Peter Ujfalusi]

If we have memory bandwidth limit configured, reject the modes which would
require more bandwidth than the limit if it is used with one full
resolution plane (most common use case).

This filtering is not providing full protection as it is possible that
application would pick smaller crtc resolution with high resolution planes
and down scaling, or can enable more smaller planes where the sum of their
bandwidth need would be higher than the limit.

This patch only allows us to filter out modes which would need more
bandwidth if they were used with one full screen plane.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 drivers/gpu/drm/omapdrm/omap_connector.c | 24 ++++++++++++++++++++++++
 drivers/gpu/drm/omapdrm/omap_drv.c       |  5 +++++
 drivers/gpu/drm/omapdrm/omap_drv.h       |  3 +++
 3 files changed, 32 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/omap_connector.c b/drivers/gpu/drm/omapdrm/omap_connector.c
index aa5ba9ae2191..c693d22960c8 100644
--- a/drivers/gpu/drm/omapdrm/omap_connector.c
+++ b/drivers/gpu/drm/omapdrm/omap_connector.c
@@ -159,6 +159,7 @@ static int omap_connector_mode_valid(struct drm_connector *connector,
 				 struct drm_display_mode *mode)
 {
 	struct omap_connector *omap_connector = to_omap_connector(connector);
+	struct omap_drm_private *priv = connector->dev->dev_private;
 	struct omap_dss_device *dssdev = omap_connector->dssdev;
 	struct omap_dss_driver *dssdrv = dssdev->driver;
 	struct videomode vm = {0};
@@ -203,6 +204,29 @@ static int omap_connector_mode_valid(struct drm_connector *connector,
 		drm_mode_destroy(dev, new_mode);
 	}
 
+	/* Check for bandwidth limit */
+	if (!r && priv->max_bandwidth) {
+		unsigned int bandwidth, real_refresh;
+
+		/*
+		 * Estimation for the bandwidth need of a given mode with one
+		 * full screen plane:
+		 * resolution * 32bpp * (real) refresh rate
+		 */
+		real_refresh = drm_mode_vrefresh(mode);
+		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+			real_refresh /= 2;
+
+		bandwidth = vm.hactive * vm.vactive * 4 * real_refresh;
+
+		/*
+		 * Reject modes which would need more bandwidth if used with one
+		 * full resolution plane (most common use case).
+		 */
+		if (priv->max_bandwidth < bandwidth)
+			ret = MODE_BAD;
+	}
+
 	DBG("connector: mode %s: "
 			"%d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
 			(ret == MODE_OK) ? "valid" : "invalid",
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c
index 528cf5c25bec..58b4a0e149e0 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.c
+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
@@ -701,6 +701,11 @@ static int pdev_probe(struct platform_device *pdev)
 	spin_lock_init(&priv->list_lock);
 	INIT_LIST_HEAD(&priv->obj_list);
 
+	/* Get memory bandwidth limits */
+	if (priv->dispc_ops->get_memory_bandwidth_limit)
+		priv->max_bandwidth =
+				priv->dispc_ops->get_memory_bandwidth_limit();
+
 	omap_gem_init(ddev);
 
 	ret = omap_modeset_init(ddev);
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.h b/drivers/gpu/drm/omapdrm/omap_drv.h
index cccaae787a7c..d49715272080 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.h
+++ b/drivers/gpu/drm/omapdrm/omap_drv.h
@@ -86,6 +86,9 @@ struct omap_drm_private {
 	spinlock_t wait_lock;		/* protects the wait_list */
 	struct list_head wait_list;	/* list of omap_irq_wait */
 	uint32_t irq_mask;		/* enabled irqs in addition to wait_list */
+
+	/* memory bandwidth limit if it is needed on the platform */
+	unsigned int max_bandwidth;
 };
 
 
-- 
Peter

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

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Re: [PATCH 3/3] drm/omap: Filter displays mode based on bandwidth limit

[Daniel Vetter]

On Fri, Oct 20, 2017 at 04:12:58PM +0300, Peter Ujfalusi wrote:
> If we have memory bandwidth limit configured, reject the modes which would
> require more bandwidth than the limit if it is used with one full
> resolution plane (most common use case).
> 
> This filtering is not providing full protection as it is possible that
> application would pick smaller crtc resolution with high resolution planes
> and down scaling, or can enable more smaller planes where the sum of their
> bandwidth need would be higher than the limit.

Note that userspace can also just pick a mode it wants, so you need to
have a proper bw check in your atomic_check logic anyway. There's some
recent work to sprinkle ->mode_valid checks over objects to help a bit
with filling that gap, you might want to look into a crtc->mode_valid
callback for this logic at least.
-Daniel
> 
> This patch only allows us to filter out modes which would need more
> bandwidth if they were used with one full screen plane.
> 
> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
> ---
>  drivers/gpu/drm/omapdrm/omap_connector.c | 24 ++++++++++++++++++++++++
>  drivers/gpu/drm/omapdrm/omap_drv.c       |  5 +++++
>  drivers/gpu/drm/omapdrm/omap_drv.h       |  3 +++
>  3 files changed, 32 insertions(+)
> 
> diff --git a/drivers/gpu/drm/omapdrm/omap_connector.c b/drivers/gpu/drm/omapdrm/omap_connector.c
> index aa5ba9ae2191..c693d22960c8 100644
> --- a/drivers/gpu/drm/omapdrm/omap_connector.c
> +++ b/drivers/gpu/drm/omapdrm/omap_connector.c
> @@ -159,6 +159,7 @@ static int omap_connector_mode_valid(struct drm_connector *connector,
>  				 struct drm_display_mode *mode)
>  {
>  	struct omap_connector *omap_connector = to_omap_connector(connector);
> +	struct omap_drm_private *priv = connector->dev->dev_private;
>  	struct omap_dss_device *dssdev = omap_connector->dssdev;
>  	struct omap_dss_driver *dssdrv = dssdev->driver;
>  	struct videomode vm = {0};
> @@ -203,6 +204,29 @@ static int omap_connector_mode_valid(struct drm_connector *connector,
>  		drm_mode_destroy(dev, new_mode);
>  	}
>  
> +	/* Check for bandwidth limit */
> +	if (!r && priv->max_bandwidth) {
> +		unsigned int bandwidth, real_refresh;
> +
> +		/*
> +		 * Estimation for the bandwidth need of a given mode with one
> +		 * full screen plane:
> +		 * resolution * 32bpp * (real) refresh rate
> +		 */
> +		real_refresh = drm_mode_vrefresh(mode);
> +		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
> +			real_refresh /= 2;
> +
> +		bandwidth = vm.hactive * vm.vactive * 4 * real_refresh;
> +
> +		/*
> +		 * Reject modes which would need more bandwidth if used with one
> +		 * full resolution plane (most common use case).
> +		 */
> +		if (priv->max_bandwidth < bandwidth)
> +			ret = MODE_BAD;
> +	}
> +
>  	DBG("connector: mode %s: "
>  			"%d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
>  			(ret == MODE_OK) ? "valid" : "invalid",
> diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c
> index 528cf5c25bec..58b4a0e149e0 100644
> --- a/drivers/gpu/drm/omapdrm/omap_drv.c
> +++ b/drivers/gpu/drm/omapdrm/omap_drv.c
> @@ -701,6 +701,11 @@ static int pdev_probe(struct platform_device *pdev)
>  	spin_lock_init(&priv->list_lock);
>  	INIT_LIST_HEAD(&priv->obj_list);
>  
> +	/* Get memory bandwidth limits */
> +	if (priv->dispc_ops->get_memory_bandwidth_limit)
> +		priv->max_bandwidth =
> +				priv->dispc_ops->get_memory_bandwidth_limit();
> +
>  	omap_gem_init(ddev);
>  
>  	ret = omap_modeset_init(ddev);
> diff --git a/drivers/gpu/drm/omapdrm/omap_drv.h b/drivers/gpu/drm/omapdrm/omap_drv.h
> index cccaae787a7c..d49715272080 100644
> --- a/drivers/gpu/drm/omapdrm/omap_drv.h
> +++ b/drivers/gpu/drm/omapdrm/omap_drv.h
> @@ -86,6 +86,9 @@ struct omap_drm_private {
>  	spinlock_t wait_lock;		/* protects the wait_list */
>  	struct list_head wait_list;	/* list of omap_irq_wait */
>  	uint32_t irq_mask;		/* enabled irqs in addition to wait_list */
> +
> +	/* memory bandwidth limit if it is needed on the platform */
> +	unsigned int max_bandwidth;
>  };
>  
>  
> -- 
> Peter
> 
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
> 
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Daniel Vetter
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http://blog.ffwll.ch
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