From: Krzysztof Kozlowski <krzk@kernel.org>
To: Varadarajan Narayanan <quic_varada@quicinc.com>,
bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com,
manivannan.sadhasivam@linaro.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, andersson@kernel.org,
konradybcio@kernel.org, linux-arm-msm@vger.kernel.org,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v13 1/4] dt-bindings: PCI: qcom: Add MHI registers for IPQ9574
Date: Thu, 13 Mar 2025 12:01:54 +0100 [thread overview]
Message-ID: <1c88f01b-4414-4f02-91ed-572a9261543a@kernel.org> (raw)
In-Reply-To: <20250313080600.1719505-2-quic_varada@quicinc.com>
On 13/03/2025 09:05, Varadarajan Narayanan wrote:
> Append the MHI register range to IPQ9574. This is an optional range used
Same question, you still did not answer - does hardware have this range?
Which hardware has it?
I pointed out that you affect at least two other variants. Your commit
msg must explain that. For example what if they do not have this range?
Then this change is just wrong.
Start documenting the hardware, not your drivers.
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-03-13 11:02 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-13 8:05 [PATCH v13 0/4] Add PCIe support for Qualcomm IPQ5332 Varadarajan Narayanan
2025-03-13 8:05 ` [PATCH v13 1/4] dt-bindings: PCI: qcom: Add MHI registers for IPQ9574 Varadarajan Narayanan
2025-03-13 11:01 ` Krzysztof Kozlowski [this message]
2025-03-13 11:51 ` Varadarajan Narayanan
2025-03-14 7:57 ` Krzysztof Kozlowski
2025-03-13 8:05 ` [PATCH v13 2/4] arm64: dts: qcom: ipq9574: Add MHI to pcie nodes Varadarajan Narayanan
2025-03-13 8:05 ` [PATCH v13 3/4] arm64: dts: qcom: ipq5332: Add PCIe related nodes Varadarajan Narayanan
2025-03-13 8:06 ` [PATCH v13 4/4] arm64: dts: qcom: ipq5332-rdp441: Enable PCIe phys and controllers Varadarajan Narayanan
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