* [PATCH 1/5] stmmac: create of compatible mdio bus for stmacc driver
2015-12-04 9:08 [PATCH 0/5] stmmac: Fixed Phy & PTP fixes Phil Reid
@ 2015-12-04 9:08 ` Phil Reid
2015-12-04 16:16 ` Rob Herring
2015-12-04 9:08 ` [PATCH 2/5] stmmac: Correct documentation on stmmac clocks Phil Reid
` (3 subsequent siblings)
4 siblings, 1 reply; 9+ messages in thread
From: Phil Reid @ 2015-12-04 9:08 UTC (permalink / raw)
To: netdev, devicetree, davem; +Cc: Phil Reid
The DSA driver needs to be passed a reference to an mdio bus. Typically
the mac is configured to use a fixed link but the mdio bus still needs
to be registered so that it con configure the switch.
This patch follows the same process as the altera tse ethernet driver for
creation of the mdio bus.
Signed-off-by: Phil Reid <preid@electromag.com.au>
---
Documentation/devicetree/bindings/net/stmmac.txt | 10 ++++++-
drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 32 ++++++++++++++++------
.../net/ethernet/stmicro/stmmac/stmmac_platform.c | 2 +-
3 files changed, 34 insertions(+), 10 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/stmmac.txt b/Documentation/devicetree/bindings/net/stmmac.txt
index f34fc3c..0056c4c 100644
--- a/Documentation/devicetree/bindings/net/stmmac.txt
+++ b/Documentation/devicetree/bindings/net/stmmac.txt
@@ -47,7 +47,8 @@ Optional properties:
- snps,burst_len: The AXI burst lenth value of the AXI BUS MODE register.
- tx-fifo-depth: See ethernet.txt file in the same directory
- rx-fifo-depth: See ethernet.txt file in the same directory
-
+- mdio: with compatible = "snps,dwmac-mdio", create and register mdio bus.
+
Examples:
gmac0: ethernet@e0800000 {
@@ -65,4 +66,11 @@ Examples:
tx-fifo-depth = <16384>;
clocks = <&clock>;
clock-names = "stmmaceth";
+ mdio0: mdio@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ phy1: ethernet-phy@0 {
+ };
+ };
};
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
index bba670c..1d972e3 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
@@ -29,7 +29,7 @@
#include <linux/slab.h>
#include <linux/of.h>
#include <linux/of_gpio.h>
-
+#include <linux/of_mdio.h>
#include <asm/io.h>
#include "stmmac.h"
@@ -201,6 +201,25 @@ int stmmac_mdio_register(struct net_device *ndev)
struct stmmac_mdio_bus_data *mdio_bus_data = priv->plat->mdio_bus_data;
int addr, found;
+#ifdef CONFIG_OF
+ struct device_node *mdio_node = NULL;
+ struct device_node *child_node = NULL;
+
+ for_each_child_of_node(priv->device->of_node, child_node) {
+ if (of_device_is_compatible(child_node, "snps,dwmac-mdio")) {
+ mdio_node = child_node;
+ break;
+ }
+ }
+
+ if (mdio_node) {
+ netdev_dbg(ndev, "FOUND MDIO subnode\n");
+ } else {
+ netdev_err(ndev, "NO MDIO subnode\n");
+ return 0;
+ }
+#endif
+
if (!mdio_bus_data)
return 0;
@@ -231,7 +250,11 @@ int stmmac_mdio_register(struct net_device *ndev)
new_bus->irq = irqlist;
new_bus->phy_mask = mdio_bus_data->phy_mask;
new_bus->parent = priv->device;
+#ifdef CONFIG_OF
+ err = of_mdiobus_register(new_bus, mdio_node);
+#else
err = mdiobus_register(new_bus);
+#endif
if (err != 0) {
pr_err("%s: Cannot register as MDIO bus\n", new_bus->name);
goto bus_register_fail;
@@ -284,13 +307,6 @@ int stmmac_mdio_register(struct net_device *ndev)
}
}
- if (!found) {
- pr_warn("%s: No PHY found\n", ndev->name);
- mdiobus_unregister(new_bus);
- mdiobus_free(new_bus);
- return -ENODEV;
- }
-
priv->mii = new_bus;
return 0;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index d02691b..6863420 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -146,7 +146,7 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0)
dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n");
- if (plat->phy_node || plat->phy_bus_name)
+ if (plat->phy_bus_name)
plat->mdio_bus_data = NULL;
else
plat->mdio_bus_data =
--
1.8.3.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH 1/5] stmmac: create of compatible mdio bus for stmacc driver
2015-12-04 9:08 ` [PATCH 1/5] stmmac: create of compatible mdio bus for stmacc driver Phil Reid
@ 2015-12-04 16:16 ` Rob Herring
0 siblings, 0 replies; 9+ messages in thread
From: Rob Herring @ 2015-12-04 16:16 UTC (permalink / raw)
To: Phil Reid; +Cc: netdev, devicetree, davem
On Fri, Dec 04, 2015 at 05:08:41PM +0800, Phil Reid wrote:
> The DSA driver needs to be passed a reference to an mdio bus. Typically
> the mac is configured to use a fixed link but the mdio bus still needs
> to be registered so that it con configure the switch.
> This patch follows the same process as the altera tse ethernet driver for
> creation of the mdio bus.
>
> Signed-off-by: Phil Reid <preid@electromag.com.au>
> ---
> Documentation/devicetree/bindings/net/stmmac.txt | 10 ++++++-
> drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 32 ++++++++++++++++------
> .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 2 +-
> 3 files changed, 34 insertions(+), 10 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/net/stmmac.txt b/Documentation/devicetree/bindings/net/stmmac.txt
> index f34fc3c..0056c4c 100644
> --- a/Documentation/devicetree/bindings/net/stmmac.txt
> +++ b/Documentation/devicetree/bindings/net/stmmac.txt
> @@ -47,7 +47,8 @@ Optional properties:
> - snps,burst_len: The AXI burst lenth value of the AXI BUS MODE register.
> - tx-fifo-depth: See ethernet.txt file in the same directory
> - rx-fifo-depth: See ethernet.txt file in the same directory
> -
> +- mdio: with compatible = "snps,dwmac-mdio", create and register mdio bus.
> +
> Examples:
>
> gmac0: ethernet@e0800000 {
> @@ -65,4 +66,11 @@ Examples:
> tx-fifo-depth = <16384>;
> clocks = <&clock>;
> clock-names = "stmmaceth";
> + mdio0: mdio@0 {
Don't need a unit address here. Otherwise, for the binding:
Acked-by: Rob Herring <robh@kernel.org>
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dwmac-mdio";
> + phy1: ethernet-phy@0 {
> + };
> + };
> };
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 2/5] stmmac: Correct documentation on stmmac clocks.
2015-12-04 9:08 [PATCH 0/5] stmmac: Fixed Phy & PTP fixes Phil Reid
2015-12-04 9:08 ` [PATCH 1/5] stmmac: create of compatible mdio bus for stmacc driver Phil Reid
@ 2015-12-04 9:08 ` Phil Reid
2015-12-04 16:18 ` Rob Herring
2015-12-04 9:08 ` [PATCH 3/5] stmmac: Fix calculations for ptp counters when clock input = 50Mhz Phil Reid
` (2 subsequent siblings)
4 siblings, 1 reply; 9+ messages in thread
From: Phil Reid @ 2015-12-04 9:08 UTC (permalink / raw)
To: netdev, devicetree, davem; +Cc: Phil Reid
devm_get_clk looks in clock-name property for matching clock.
the ptp_ref_clk property is ignored.
Signed-off-by: Phil Reid <preid@electromag.com.au>
---
Documentation/devicetree/bindings/net/stmmac.txt | 17 ++++++++---------
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/stmmac.txt b/Documentation/devicetree/bindings/net/stmmac.txt
index 0056c4c..060e2d5 100644
--- a/Documentation/devicetree/bindings/net/stmmac.txt
+++ b/Documentation/devicetree/bindings/net/stmmac.txt
@@ -35,15 +35,14 @@ Optional properties:
- reset-names: Should contain the reset signal name "stmmaceth", if a
reset phandle is given
- max-frame-size: See ethernet.txt file in the same directory
-- clocks: If present, the first clock should be the GMAC main clock and
- the second clock should be peripheral's register interface clock. Further
- clocks may be specified in derived bindings.
-- clock-names: One name for each entry in the clocks property, the
- first one should be "stmmaceth" and the second one should be "pclk".
-- clk_ptp_ref: this is the PTP reference clock; in case of the PTP is
- available this clock is used for programming the Timestamp Addend Register.
- If not passed then the system clock will be used and this is fine on some
- platforms.
+- clocks: If present, the first clock should be the GMAC main clock
+ The optional second clock should be peripheral's register interface clock.
+ The third optional clock should be the ptp reference clock.
+ Further clocks may be specified in derived bindings.
+- clock-names: One name for each entry in the clocks property.
+ The first one should be "stmmaceth".
+ The optional second one should be "pclk".
+ The optional third one should be "clk_ptp_ref".
- snps,burst_len: The AXI burst lenth value of the AXI BUS MODE register.
- tx-fifo-depth: See ethernet.txt file in the same directory
- rx-fifo-depth: See ethernet.txt file in the same directory
--
1.8.3.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH 2/5] stmmac: Correct documentation on stmmac clocks.
2015-12-04 9:08 ` [PATCH 2/5] stmmac: Correct documentation on stmmac clocks Phil Reid
@ 2015-12-04 16:18 ` Rob Herring
0 siblings, 0 replies; 9+ messages in thread
From: Rob Herring @ 2015-12-04 16:18 UTC (permalink / raw)
To: Phil Reid; +Cc: netdev, devicetree, davem
On Fri, Dec 04, 2015 at 05:08:42PM +0800, Phil Reid wrote:
> devm_get_clk looks in clock-name property for matching clock.
> the ptp_ref_clk property is ignored.
>
> Signed-off-by: Phil Reid <preid@electromag.com.au>
Acked-by: Rob Herring <robh@kernel.org>
> ---
> Documentation/devicetree/bindings/net/stmmac.txt | 17 ++++++++---------
> 1 file changed, 8 insertions(+), 9 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/net/stmmac.txt b/Documentation/devicetree/bindings/net/stmmac.txt
> index 0056c4c..060e2d5 100644
> --- a/Documentation/devicetree/bindings/net/stmmac.txt
> +++ b/Documentation/devicetree/bindings/net/stmmac.txt
> @@ -35,15 +35,14 @@ Optional properties:
> - reset-names: Should contain the reset signal name "stmmaceth", if a
> reset phandle is given
> - max-frame-size: See ethernet.txt file in the same directory
> -- clocks: If present, the first clock should be the GMAC main clock and
> - the second clock should be peripheral's register interface clock. Further
> - clocks may be specified in derived bindings.
> -- clock-names: One name for each entry in the clocks property, the
> - first one should be "stmmaceth" and the second one should be "pclk".
> -- clk_ptp_ref: this is the PTP reference clock; in case of the PTP is
> - available this clock is used for programming the Timestamp Addend Register.
> - If not passed then the system clock will be used and this is fine on some
> - platforms.
> +- clocks: If present, the first clock should be the GMAC main clock
> + The optional second clock should be peripheral's register interface clock.
> + The third optional clock should be the ptp reference clock.
> + Further clocks may be specified in derived bindings.
> +- clock-names: One name for each entry in the clocks property.
> + The first one should be "stmmaceth".
> + The optional second one should be "pclk".
> + The optional third one should be "clk_ptp_ref".
> - snps,burst_len: The AXI burst lenth value of the AXI BUS MODE register.
> - tx-fifo-depth: See ethernet.txt file in the same directory
> - rx-fifo-depth: See ethernet.txt file in the same directory
> --
> 1.8.3.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 3/5] stmmac: Fix calculations for ptp counters when clock input = 50Mhz.
2015-12-04 9:08 [PATCH 0/5] stmmac: Fixed Phy & PTP fixes Phil Reid
2015-12-04 9:08 ` [PATCH 1/5] stmmac: create of compatible mdio bus for stmacc driver Phil Reid
2015-12-04 9:08 ` [PATCH 2/5] stmmac: Correct documentation on stmmac clocks Phil Reid
@ 2015-12-04 9:08 ` Phil Reid
2015-12-04 9:08 ` [PATCH 4/5] stmmac: Add ptp debugfs entry Phil Reid
2015-12-04 9:08 ` [PATCH 5/5] stmmac: socfpga: Provide dt node to config ptp clk source Phil Reid
4 siblings, 0 replies; 9+ messages in thread
From: Phil Reid @ 2015-12-04 9:08 UTC (permalink / raw)
To: netdev, devicetree, davem; +Cc: Phil Reid
stmmac_config_sub_second_increment set the sub second increment to 20ns.
Driver is configured to use the fine adjustment method where the sub second
register is incremented when the acculumator incremented by the addend
register wraps overflows. This accumulator is update on every ptp clk
cycle. If a ptp clk with a period of greater than 20ns was used the
sub second register would not get updated correctly.
Instead set the sub sec increment to twice the period of the ptp clk.
This result in the addend register being set mid range and overflow
the accumlator every 2 clock cycles.
Signed-off-by: Phil Reid <preid@electromag.com.au>
---
drivers/net/ethernet/stmicro/stmmac/common.h | 2 +-
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c | 8 +++++---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 18 +++++++-----------
3 files changed, 13 insertions(+), 15 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h
index f4518bc..1e19c8f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -439,7 +439,7 @@ struct stmmac_ops {
/* PTP and HW Timer helpers */
struct stmmac_hwtimestamp {
void (*config_hw_tstamping) (void __iomem *ioaddr, u32 data);
- void (*config_sub_second_increment) (void __iomem *ioaddr);
+ u32 (*config_sub_second_increment) (void __iomem *ioaddr, u32 clk_rate);
int (*init_systime) (void __iomem *ioaddr, u32 sec, u32 nsec);
int (*config_addend) (void __iomem *ioaddr, u32 addend);
int (*adjust_systime) (void __iomem *ioaddr, u32 sec, u32 nsec,
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
index 76ad214..83fa263 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
@@ -33,22 +33,24 @@ static void stmmac_config_hw_tstamping(void __iomem *ioaddr, u32 data)
writel(data, ioaddr + PTP_TCR);
}
-static void stmmac_config_sub_second_increment(void __iomem *ioaddr)
+static u32 stmmac_config_sub_second_increment(void __iomem *ioaddr, u32 ptp_clock)
{
u32 value = readl(ioaddr + PTP_TCR);
unsigned long data;
/* Convert the ptp_clock to nano second
- * formula = (1/ptp_clock) * 1000000000
+ * formula = (2/ptp_clock) * 1000000000
* where, ptp_clock = 50MHz.
*/
- data = (1000000000ULL / 50000000);
+ data = (2000000000ULL / ptp_clock);
/* 0.465ns accuracy */
if (!(value & PTP_TCR_TSCTRLSSR))
data = (data * 1000) / 465;
writel(data, ioaddr + PTP_SSIR);
+
+ return data;
}
static int stmmac_init_systime(void __iomem *ioaddr, u32 sec, u32 nsec)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 3c6549a..ab8d916 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -53,6 +53,7 @@
#include "stmmac.h"
#include <linux/reset.h>
#include <linux/of_mdio.h>
+#include "dwmac1000.h"
#define STMMAC_ALIGN(x) L1_CACHE_ALIGN(x)
@@ -185,7 +186,7 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv)
priv->clk_csr = STMMAC_CSR_100_150M;
else if ((clk_rate >= CSR_F_150M) && (clk_rate < CSR_F_250M))
priv->clk_csr = STMMAC_CSR_150_250M;
- else if ((clk_rate >= CSR_F_250M) && (clk_rate <= CSR_F_300M))
+ else if ((clk_rate >= CSR_F_250M) && (clk_rate < CSR_F_300M))
priv->clk_csr = STMMAC_CSR_250_300M;
}
}
@@ -435,6 +436,7 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
u32 ts_master_en = 0;
u32 ts_event_en = 0;
u32 value = 0;
+ u32 sec_inc;
if (!(priv->dma_cap.time_stamp || priv->adv_ts)) {
netdev_alert(priv->dev, "No support for HW time stamping\n");
@@ -598,24 +600,18 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
tstamp_all | ptp_v2 | ptp_over_ethernet |
ptp_over_ipv6_udp | ptp_over_ipv4_udp | ts_event_en |
ts_master_en | snap_type_sel);
-
priv->hw->ptp->config_hw_tstamping(priv->ioaddr, value);
/* program Sub Second Increment reg */
- priv->hw->ptp->config_sub_second_increment(priv->ioaddr);
+ sec_inc = priv->hw->ptp->config_sub_second_increment(priv->ioaddr, priv->clk_ptp_rate);
+ temp = div_u64(1000000000ULL, sec_inc);
/* calculate default added value:
* formula is :
* addend = (2^32)/freq_div_ratio;
- * where, freq_div_ratio = clk_ptp_ref_i/50MHz
- * hence, addend = ((2^32) * 50MHz)/clk_ptp_ref_i;
- * NOTE: clk_ptp_ref_i should be >= 50MHz to
- * achieve 20ns accuracy.
- *
- * 2^x * y == (y << x), hence
- * 2^32 * 50000000 ==> (50000000 << 32)
+ * where, freq_div_ratio = 1e9ns/sec_inc
*/
- temp = (u64) (50000000ULL << 32);
+ temp = (u64) (temp << 32);
priv->default_addend = div_u64(temp, priv->clk_ptp_rate);
priv->hw->ptp->config_addend(priv->ioaddr,
priv->default_addend);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 4/5] stmmac: Add ptp debugfs entry.
2015-12-04 9:08 [PATCH 0/5] stmmac: Fixed Phy & PTP fixes Phil Reid
` (2 preceding siblings ...)
2015-12-04 9:08 ` [PATCH 3/5] stmmac: Fix calculations for ptp counters when clock input = 50Mhz Phil Reid
@ 2015-12-04 9:08 ` Phil Reid
2015-12-04 9:08 ` [PATCH 5/5] stmmac: socfpga: Provide dt node to config ptp clk source Phil Reid
4 siblings, 0 replies; 9+ messages in thread
From: Phil Reid @ 2015-12-04 9:08 UTC (permalink / raw)
To: netdev, devicetree, davem; +Cc: Phil Reid
This adds a debugfs entry to view the current status of the ptp
registers.
Signed-off-by: Phil Reid <preid@electromag.com.au>
---
drivers/net/ethernet/stmicro/stmmac/stmmac.h | 1 +
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 61 +++++++++++++++++++++++
drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h | 5 ++
3 files changed, 67 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
index 1f3b33a..d0ac1b1 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
@@ -130,6 +130,7 @@ struct stmmac_priv {
struct dentry *dbgfs_dir;
struct dentry *dbgfs_rings_status;
struct dentry *dbgfs_dma_cap;
+ struct dentry *dbgfs_ptp;
#endif
};
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index ab8d916..f75b2f9 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -2657,6 +2657,57 @@ static const struct file_operations stmmac_dma_cap_fops = {
.release = single_release,
};
+static int stmmac_sysfs_ptp_read(struct seq_file *seq, void *v)
+{
+ struct net_device *dev = seq->private;
+ struct stmmac_priv *priv = netdev_priv(dev);
+
+ if (!(priv->dma_cap.time_stamp || priv->adv_ts)) {
+ seq_printf(seq, "PTP HW features not supported\n");
+ return 0;
+ }
+
+ seq_printf(seq, "==============================\n");
+ seq_printf(seq, "\tPTP Status\n");
+ seq_printf(seq, "==============================\n");
+
+ #define DUMP_REG(x) seq_printf(seq, "%-20s %04x %08x\n", #x, x, readl(priv->ioaddr + x));
+ DUMP_REG(GMAC_INT_STATUS);
+ DUMP_REG(GMAC_INT_MASK);
+
+ DUMP_REG(PTP_TCR);
+ DUMP_REG(PTP_SSIR);
+ DUMP_REG(PTP_STSR);
+ DUMP_REG(PTP_STNSR);
+ DUMP_REG(PTP_STSUR);
+ DUMP_REG(PTP_STNSUR);
+ DUMP_REG(PTP_TAR);
+ DUMP_REG(PTP_TTSR);
+ DUMP_REG(PTP_TTNSR);
+ DUMP_REG(PTP_STHWSR);
+ DUMP_REG(PTP_TSR);
+ DUMP_REG(PTP_PPSCTLR);
+ DUMP_REG(PTP_AUXTSTNSR);
+ DUMP_REG(PTP_AUXTSTSR);
+ DUMP_REG(PTP_PPS0INTRR);
+ DUMP_REG(PTP_PPS0WDTHR);
+
+ return 0;
+}
+
+static int stmmac_sysfs_ptp_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, stmmac_sysfs_ptp_read, inode->i_private);
+}
+
+static const struct file_operations stmmac_ptp_fops = {
+ .owner = THIS_MODULE,
+ .open = stmmac_sysfs_ptp_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
static int stmmac_init_fs(struct net_device *dev)
{
struct stmmac_priv *priv = netdev_priv(dev);
@@ -2692,6 +2743,16 @@ static int stmmac_init_fs(struct net_device *dev)
if (!priv->dbgfs_dma_cap || IS_ERR(priv->dbgfs_dma_cap)) {
pr_info("ERROR creating stmmac MMC debugfs file\n");
debugfs_remove_recursive(priv->dbgfs_dir);
+ }
+
+ /* Entry to report the PTP status */
+ priv->dbgfs_ptp = debugfs_create_file("ptp", S_IRUGO,
+ priv->dbgfs_dir,
+ dev, &stmmac_ptp_fops);
+
+ if (!priv->dbgfs_ptp || IS_ERR(priv->dbgfs_ptp)) {
+ pr_info("ERROR creating stmmac PTP debugfs file\n");
+ debugfs_remove_recursive(priv->dbgfs_dir);
return -ENOMEM;
}
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h
index 4535df3..b00b005 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h
@@ -37,6 +37,11 @@
#define PTP_TTNSR 0x0720 /* Target Time Nanoseconds Reg */
#define PTP_STHWSR 0x0724 /* System Time - Higher Word Seconds Reg */
#define PTP_TSR 0x0728 /* Timestamp Status */
+#define PTP_PPSCTLR 0x072C /* PPS Control Reg */
+#define PTP_AUXTSTNSR 0x0730 /* Aux Timestamp - Nanoseconds Reg */
+#define PTP_AUXTSTSR 0x0734 /* Aux Timestamp - Seconds Reg */
+#define PTP_PPS0INTRR 0x0760 /* PPS0 Interval Reg */
+#define PTP_PPS0WDTHR 0x0764 /* PPS0 Width Reg */
#define PTP_STNSUR_ADDSUB_SHIFT 31
--
1.8.3.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 5/5] stmmac: socfpga: Provide dt node to config ptp clk source.
2015-12-04 9:08 [PATCH 0/5] stmmac: Fixed Phy & PTP fixes Phil Reid
` (3 preceding siblings ...)
2015-12-04 9:08 ` [PATCH 4/5] stmmac: Add ptp debugfs entry Phil Reid
@ 2015-12-04 9:08 ` Phil Reid
2015-12-04 16:19 ` Rob Herring
4 siblings, 1 reply; 9+ messages in thread
From: Phil Reid @ 2015-12-04 9:08 UTC (permalink / raw)
To: netdev, devicetree, davem; +Cc: Phil Reid
Signed-off-by: Phil Reid <preid@electromag.com.au>
---
Documentation/devicetree/bindings/net/socfpga-dwmac.txt | 2 ++
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 10 ++++++++++
2 files changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
index 3a9d679..72d82d6 100644
--- a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
+++ b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
@@ -11,6 +11,8 @@ Required properties:
designware version numbers documented in stmmac.txt
- altr,sysmgr-syscon : Should be the phandle to the system manager node that
encompasses the glue register, the register offset, and the register shift.
+ - altr,f2h_ptp_ref_clk use f2h_ptp_ref_clk instead of default eosc1 clock
+ for ptp ref clk. This affects all emacs as the clock is common.
Optional properties:
altr,emac-splitter: Should be the phandle to the emac splitter soft IP node if
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
index 401383b..c1bab62 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
@@ -32,6 +32,7 @@
#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII 0x2
#define SYSMGR_EMACGRP_CTRL_PHYSEL_WIDTH 2
#define SYSMGR_EMACGRP_CTRL_PHYSEL_MASK 0x00000003
+#define SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK 0x00000010
#define EMAC_SPLITTER_CTRL_REG 0x0
#define EMAC_SPLITTER_CTRL_SPEED_MASK 0x3
@@ -47,6 +48,7 @@ struct socfpga_dwmac {
struct regmap *sys_mgr_base_addr;
struct reset_control *stmmac_rst;
void __iomem *splitter_base;
+ bool f2h_ptp_ref_clk;
};
static void socfpga_dwmac_fix_mac_speed(void *priv, unsigned int speed)
@@ -116,6 +118,9 @@ static int socfpga_dwmac_parse_data(struct socfpga_dwmac *dwmac, struct device *
return -EINVAL;
}
+ dwmac->f2h_ptp_ref_clk = of_property_read_bool(np, "f2h_ptp_ref_clk");
+
+
np_splitter = of_parse_phandle(np, "altr,emac-splitter", 0);
if (np_splitter) {
if (of_address_to_resource(np_splitter, 0, &res_splitter)) {
@@ -171,6 +176,11 @@ static int socfpga_dwmac_setup(struct socfpga_dwmac *dwmac)
ctrl &= ~(SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << reg_shift);
ctrl |= val << reg_shift;
+ if(dwmac->f2h_ptp_ref_clk)
+ ctrl |= SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK << (reg_shift / 2);
+ else
+ ctrl &= ~(SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK << (reg_shift / 2));
+
regmap_write(sys_mgr_base_addr, reg_offset, ctrl);
return 0;
}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH 5/5] stmmac: socfpga: Provide dt node to config ptp clk source.
2015-12-04 9:08 ` [PATCH 5/5] stmmac: socfpga: Provide dt node to config ptp clk source Phil Reid
@ 2015-12-04 16:19 ` Rob Herring
0 siblings, 0 replies; 9+ messages in thread
From: Rob Herring @ 2015-12-04 16:19 UTC (permalink / raw)
To: Phil Reid; +Cc: netdev, devicetree, davem
On Fri, Dec 04, 2015 at 05:08:45PM +0800, Phil Reid wrote:
> Signed-off-by: Phil Reid <preid@electromag.com.au>
> ---
> Documentation/devicetree/bindings/net/socfpga-dwmac.txt | 2 ++
> drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 10 ++++++++++
> 2 files changed, 12 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
> index 3a9d679..72d82d6 100644
> --- a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
> +++ b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
> @@ -11,6 +11,8 @@ Required properties:
> designware version numbers documented in stmmac.txt
> - altr,sysmgr-syscon : Should be the phandle to the system manager node that
> encompasses the glue register, the register offset, and the register shift.
> + - altr,f2h_ptp_ref_clk use f2h_ptp_ref_clk instead of default eosc1 clock
> + for ptp ref clk. This affects all emacs as the clock is common.
This and ...
> + dwmac->f2h_ptp_ref_clk = of_property_read_bool(np, "f2h_ptp_ref_clk");
this don't match.
^ permalink raw reply [flat|nested] 9+ messages in thread