* [PATCH] pinctrl: imx: imx8mm: fix pad offset of SD1_DATA0 pin
@ 2021-02-11 9:54 Claudius Heine
2021-02-11 10:15 ` Claudius Heine
2021-02-11 10:17 ` Frieder Schrempf
0 siblings, 2 replies; 5+ messages in thread
From: Claudius Heine @ 2021-02-11 9:54 UTC (permalink / raw)
To: Rob Herring, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, NXP Linux Team, Claudius Heine,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
Cc: Marek Vasut
There is a 0 missing in the pad register offset. This patch adds it.
Signed-off-by: Claudius Heine <ch@denx.de>
---
arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
index 5ccc4cc91959d..a003e6af33533 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
+++ b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
@@ -124,7 +124,7 @@
#define MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x0A4 0x30C 0x000 0x0 0x0
#define MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1 0x0A4 0x30C 0x000 0x5 0x0
#define MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x0A8 0x310 0x000 0x0 0x0
-#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x0A8 0x31 0x000 0x5 0x0
+#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x0A8 0x310 0x000 0x5 0x0
#define MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x0AC 0x314 0x000 0x0 0x0
#define MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3 0x0AC 0x314 0x000 0x5 0x0
#define MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x0B0 0x318 0x000 0x0 0x0
--
2.30.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] pinctrl: imx: imx8mm: fix pad offset of SD1_DATA0 pin
2021-02-11 9:54 [PATCH] pinctrl: imx: imx8mm: fix pad offset of SD1_DATA0 pin Claudius Heine
@ 2021-02-11 10:15 ` Claudius Heine
2021-02-11 10:17 ` Fabio Estevam
2021-02-11 10:17 ` Frieder Schrempf
1 sibling, 1 reply; 5+ messages in thread
From: Claudius Heine @ 2021-02-11 10:15 UTC (permalink / raw)
To: Rob Herring, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, NXP Linux Team,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
Cc: Marek Vasut, stable
Hi,
can you please add:
Fixes: c1c9d41319c3 ("dt-bindings: imx: Add pinctrl binding doc for imx8mm")
to the commit message.
regards,
Claudius
On 2021-02-11 10:54, Claudius Heine wrote:
> There is a 0 missing in the pad register offset. This patch adds it.
>
> Signed-off-by: Claudius Heine <ch@denx.de>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
> index 5ccc4cc91959d..a003e6af33533 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
> @@ -124,7 +124,7 @@
> #define MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x0A4 0x30C 0x000 0x0 0x0
> #define MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1 0x0A4 0x30C 0x000 0x5 0x0
> #define MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x0A8 0x310 0x000 0x0 0x0
> -#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x0A8 0x31 0x000 0x5 0x0
> +#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x0A8 0x310 0x000 0x5 0x0
> #define MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x0AC 0x314 0x000 0x0 0x0
> #define MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3 0x0AC 0x314 0x000 0x5 0x0
> #define MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x0B0 0x318 0x000 0x0 0x0
>
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] pinctrl: imx: imx8mm: fix pad offset of SD1_DATA0 pin
2021-02-11 10:15 ` Claudius Heine
@ 2021-02-11 10:17 ` Fabio Estevam
0 siblings, 0 replies; 5+ messages in thread
From: Fabio Estevam @ 2021-02-11 10:17 UTC (permalink / raw)
To: Claudius Heine
Cc: Rob Herring, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
NXP Linux Team,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list, Marek Vasut, stable
Hi Claudius,
On Thu, Feb 11, 2021 at 7:15 AM Claudius Heine <ch@denx.de> wrote:
>
> Hi,
>
> can you please add:
>
> Fixes: c1c9d41319c3 ("dt-bindings: imx: Add pinctrl binding doc for imx8mm")
Yes, I was about to suggest the same. Thanks for the fix:
Reviewed-by: Fabio Estevam <festevam@gmail.com>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] pinctrl: imx: imx8mm: fix pad offset of SD1_DATA0 pin
2021-02-11 9:54 [PATCH] pinctrl: imx: imx8mm: fix pad offset of SD1_DATA0 pin Claudius Heine
2021-02-11 10:15 ` Claudius Heine
@ 2021-02-11 10:17 ` Frieder Schrempf
2021-02-11 11:20 ` Marek Vasut
1 sibling, 1 reply; 5+ messages in thread
From: Frieder Schrempf @ 2021-02-11 10:17 UTC (permalink / raw)
To: Claudius Heine, Rob Herring, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
Cc: Marek Vasut
On 11.02.21 10:54, Claudius Heine wrote:
> There is a 0 missing in the pad register offset. This patch adds it.
>
> Signed-off-by: Claudius Heine <ch@denx.de>
I think this should rather be prefixed by "arm64: dts: imx8mm:" as this
is no change in the pinctrl driver, but only in the devicetree.
And I guess this deserves a "Fixes" and "Cc: stable" tag, so:
Fixes: c1c9d41319c3 ("dt-bindings: imx: Add pinctrl binding doc for imx8mm")
Cc: stable@vger.kernel.org
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
> index 5ccc4cc91959d..a003e6af33533 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
> @@ -124,7 +124,7 @@
> #define MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x0A4 0x30C 0x000 0x0 0x0
> #define MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1 0x0A4 0x30C 0x000 0x5 0x0
> #define MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x0A8 0x310 0x000 0x0 0x0
> -#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x0A8 0x31 0x000 0x5 0x0
> +#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x0A8 0x310 0x000 0x5 0x0
> #define MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x0AC 0x314 0x000 0x0 0x0
> #define MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3 0x0AC 0x314 0x000 0x5 0x0
> #define MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x0B0 0x318 0x000 0x0 0x0
>
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] pinctrl: imx: imx8mm: fix pad offset of SD1_DATA0 pin
2021-02-11 10:17 ` Frieder Schrempf
@ 2021-02-11 11:20 ` Marek Vasut
0 siblings, 0 replies; 5+ messages in thread
From: Marek Vasut @ 2021-02-11 11:20 UTC (permalink / raw)
To: Frieder Schrempf, Claudius Heine, Rob Herring, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
On 2/11/21 11:17 AM, Frieder Schrempf wrote:
> On 11.02.21 10:54, Claudius Heine wrote:
>> There is a 0 missing in the pad register offset. This patch adds it.
>>
>> Signed-off-by: Claudius Heine <ch@denx.de>
>
> I think this should rather be prefixed by "arm64: dts: imx8mm:" as this
> is no change in the pinctrl driver, but only in the devicetree.
>
> And I guess this deserves a "Fixes" and "Cc: stable" tag, so:
>
> Fixes: c1c9d41319c3 ("dt-bindings: imx: Add pinctrl binding doc for
> imx8mm")
> Cc: stable@vger.kernel.org
> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Indeed.
But since this isn't the first such fix, I wonder whether it wouldn't be
a good idea to regenerate those pinctrl tables and see whether there are
any other such issues in them. I wonder, is there some sort of register
and bit list in machine-parseable form for the MX8M ?
^ permalink raw reply [flat|nested] 5+ messages in thread
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2021-02-11 9:54 [PATCH] pinctrl: imx: imx8mm: fix pad offset of SD1_DATA0 pin Claudius Heine
2021-02-11 10:15 ` Claudius Heine
2021-02-11 10:17 ` Fabio Estevam
2021-02-11 10:17 ` Frieder Schrempf
2021-02-11 11:20 ` Marek Vasut
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