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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Qiang Yu <quic_qianyu@quicinc.com>
Cc: vkoul@kernel.org, kishon@kernel.org, robh@kernel.org,
	andersson@kernel.org, konradybcio@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org,
	abel.vesa@linaro.org, quic_msarkar@quicinc.com,
	quic_devipriy@quicinc.com, dmitry.baryshkov@linaro.org,
	kw@linux.com, lpieralisi@kernel.org, neil.armstrong@linaro.org,
	linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH v4 2/6] dt-bindings: PCI: qcom: Move OPP table to qcom,pcie-common.yaml
Date: Tue, 24 Sep 2024 16:08:28 +0200	[thread overview]
Message-ID: <20240924140828.mz5vjcicygsj4eb4@thinkpad> (raw)
In-Reply-To: <20240924101444.3933828-3-quic_qianyu@quicinc.com>

On Tue, Sep 24, 2024 at 03:14:40AM -0700, Qiang Yu wrote:

> OPP table is a generic property that is also required by other qcom
> platforms. Hence move this property to qcom,pcie-common.yaml so that PCIe
> on other qcom platforms is able to adjust power domain performance state
> and ICC peak bw according to PCIe gen speed and link width.
> 
> Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

- Mani

> ---
>  Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml | 4 ++++
>  Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml | 4 ----
>  2 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml
> index 704c0f58eea5..3c6430fe9331 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml
> @@ -78,6 +78,10 @@ properties:
>      description: GPIO controlled connection to WAKE# signal
>      maxItems: 1
>  
> +  operating-points-v2: true
> +  opp-table:
> +    type: object
> +
>  required:
>    - reg
>    - reg-names
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml
> index 46bd59eefadb..6e0a6d8f0ed0 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml
> @@ -70,10 +70,6 @@ properties:
>        - const: msi7
>        - const: global
>  
> -  operating-points-v2: true
> -  opp-table:
> -    type: object
> -
>    resets:
>      maxItems: 1
>  
> -- 
> 2.34.1
> 

-- 
மணிவண்ணன் சதாசிவம்

  reply	other threads:[~2024-09-24 14:08 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-24 10:14 [PATCH v4 0/6] Add support for PCIe3 on x1e80100 Qiang Yu
2024-09-24 10:14 ` [PATCH v4 1/6] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100 QMP PCIe PHY Gen4 x8 Qiang Yu
2024-09-24 10:14 ` [PATCH v4 2/6] dt-bindings: PCI: qcom: Move OPP table to qcom,pcie-common.yaml Qiang Yu
2024-09-24 14:08   ` Manivannan Sadhasivam [this message]
2024-09-24 18:39   ` Krzysztof Kozlowski
2024-09-24 10:14 ` [PATCH v4 3/6] phy: qcom: qmp: Add phy register and clk setting for x1e80100 PCIe3 Qiang Yu
2024-09-24 15:15   ` Johan Hovold
2024-09-25  3:38     ` Qiang Yu
2024-09-25  8:14       ` Johan Hovold
2024-09-24 10:14 ` [PATCH v4 4/6] clk: qcom: gcc-x1e80100: Fix halt_check for pipediv2 clocks Qiang Yu
2024-09-24 14:31   ` Johan Hovold
2024-09-25  3:40     ` Qiang Yu
2024-09-24 10:14 ` [PATCH v4 5/6] PCI: qcom: Add support for X1E80100 SoC Qiang Yu
2024-09-24 13:50   ` Manivannan Sadhasivam
2024-09-24 15:17     ` Johan Hovold
2024-09-25  3:47       ` Qiang Yu
2024-09-25  8:07         ` Manivannan Sadhasivam
2024-09-26  3:28           ` Qiang Yu
2024-09-26  5:19             ` Qiang Yu
2024-09-30  7:25               ` Manivannan Sadhasivam
2024-09-25  3:44     ` Qiang Yu
2024-09-24 10:14 ` [PATCH v4 6/6] arm64: dts: qcom: x1e80100: Add support for PCIe3 on x1e80100 Qiang Yu
2024-09-24 14:06   ` Manivannan Sadhasivam
2024-09-24 14:26   ` Konrad Dybcio
2024-09-25  3:57     ` Qiang Yu
2024-09-25  8:05     ` Manivannan Sadhasivam
2024-09-25  9:30       ` Konrad Dybcio
2024-09-25  9:46         ` Konrad Dybcio
2024-09-25 12:52           ` Manivannan Sadhasivam
2024-09-26  3:15             ` Qiang Yu
2024-09-30  7:32               ` Manivannan Sadhasivam
2024-09-24 14:43   ` Johan Hovold
2024-09-25  6:37     ` Qiang Yu
2024-09-25  7:58       ` Manivannan Sadhasivam

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