From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
To: lpieralisi@kernel.org, kw@linux.com,
manivannan.sadhasivam@linaro.org, robh@kernel.org,
bhelgaas@google.com, krzk+dt@kernel.org, conor+dt@kernel.org,
dinguyen@kernel.org, joyce.ooi@intel.com,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: matthew.gerlach@altera.com,
Matthew Gerlach <matthew.gerlach@linux.intel.com>
Subject: [PATCH v3 2/5] arm64: dts: agilex: add soc0 label
Date: Wed, 8 Jan 2025 10:59:06 -0600 [thread overview]
Message-ID: <20250108165909.3344354-3-matthew.gerlach@linux.intel.com> (raw)
In-Reply-To: <20250108165909.3344354-1-matthew.gerlach@linux.intel.com>
Add a label to the soc@0 device tree node.
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
---
v3:
- Remove accepted patches from patch set.
---
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
index 2a5eeb21da47..98e14b9b4228 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
@@ -149,7 +149,7 @@ usbphy0: usbphy {
compatible = "usb-nop-xceiv";
};
- soc@0 {
+ soc0: soc@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
--
2.34.1
next prev parent reply other threads:[~2025-01-08 17:02 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-08 16:59 [PATCH v3 0/5] Add PCIe Root Port support for Agilex family of chips Matthew Gerlach
2025-01-08 16:59 ` [PATCH v3 1/5] dt-bindings: PCI: altera: Add binding for Agilex Matthew Gerlach
2025-01-08 16:59 ` Matthew Gerlach [this message]
2025-01-08 16:59 ` [PATCH v3 3/5] arm64: dts: agilex: add dtsi for PCIe Root Port Matthew Gerlach
2025-01-08 18:37 ` Bjorn Helgaas
2025-01-08 22:53 ` matthew.gerlach
2025-01-08 23:05 ` Bjorn Helgaas
2025-01-08 16:59 ` [PATCH v3 4/5] arm64: dts: agilex: add dts enabling " Matthew Gerlach
2025-01-08 16:59 ` [PATCH v3 5/5] PCI: altera: Add Agilex support Matthew Gerlach
2025-01-16 17:05 ` Manivannan Sadhasivam
2025-01-17 19:09 ` matthew.gerlach
2025-01-17 21:09 ` matthew.gerlach
2025-01-08 22:34 ` [PATCH v3 0/5] Add PCIe Root Port support for Agilex family of chips Rob Herring (Arm)
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