From: Artur Weber <aweber.kernel@gmail.com>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Florian Fainelli <florian.fainelli@broadcom.com>,
Ray Jui <rjui@broadcom.com>,
Scott Branden <sbranden@broadcom.com>,
Broadcom internal kernel review list
<bcm-kernel-feedback-list@broadcom.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: Alex Elder <elder@kernel.org>,
Stanislav Jakubek <stano.jakubek@gmail.com>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org,
~postmarketos/upstreaming@lists.sr.ht,
Artur Weber <aweber.kernel@gmail.com>
Subject: [PATCH v2 4/7] clk: bcm21664: Add matching bus clocks for peripheral clocks
Date: Mon, 03 Mar 2025 21:27:52 +0100 [thread overview]
Message-ID: <20250303-kona-bus-clock-v2-4-a363c6a6b798@gmail.com> (raw)
In-Reply-To: <20250303-kona-bus-clock-v2-0-a363c6a6b798@gmail.com>
Now that bus clock support has been implemented into the Broadcom Kona
clock driver, add bus clocks corresponding to HUB_TIMER, SDIO, UART and
BSC, as well as the USB OTG bus clock.
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
---
Changes in v2:
- Adapt to dropped prereq clocks
---
drivers/clk/bcm/clk-bcm21664.c | 83 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 83 insertions(+)
diff --git a/drivers/clk/bcm/clk-bcm21664.c b/drivers/clk/bcm/clk-bcm21664.c
index 520c3aeb4ea9c4a431512c0909f9545c1761d17a..171fbf46ff3b32cf77116d003708643de76fff70 100644
--- a/drivers/clk/bcm/clk-bcm21664.c
+++ b/drivers/clk/bcm/clk-bcm21664.c
@@ -39,6 +39,11 @@ static struct peri_clk_data hub_timer_data = {
.trig = TRIGGER(0x0a40, 4),
};
+static struct bus_clk_data hub_timer_apb_data = {
+ .gate = HW_SW_GATE(0x0414, 18, 3, 2),
+ .hyst = HYST(0x0414, 10, 11),
+};
+
static struct ccu_data aon_ccu_data = {
BCM21664_CCU_COMMON(aon, AON),
.policy = {
@@ -48,6 +53,8 @@ static struct ccu_data aon_ccu_data = {
.kona_clks = {
[BCM21664_AON_CCU_HUB_TIMER] =
KONA_CLK(aon, hub_timer, peri),
+ [BCM21664_AON_CCU_HUB_TIMER_APB] =
+ KONA_CLK(aon, hub_timer_apb, bus),
[BCM21664_AON_CCU_CLOCK_COUNT] = LAST_KONA_CLK,
},
};
@@ -122,6 +129,26 @@ static struct peri_clk_data sdio4_sleep_data = {
.gate = HW_SW_GATE(0x0360, 18, 2, 3),
};
+static struct bus_clk_data sdio1_ahb_data = {
+ .gate = HW_SW_GATE(0x0358, 16, 0, 1),
+};
+
+static struct bus_clk_data sdio2_ahb_data = {
+ .gate = HW_SW_GATE(0x035c, 16, 0, 1),
+};
+
+static struct bus_clk_data sdio3_ahb_data = {
+ .gate = HW_SW_GATE(0x0364, 16, 0, 1),
+};
+
+static struct bus_clk_data sdio4_ahb_data = {
+ .gate = HW_SW_GATE(0x0360, 16, 0, 1),
+};
+
+static struct bus_clk_data usb_otg_ahb_data = {
+ .gate = HW_SW_GATE(0x0348, 16, 0, 1),
+};
+
static struct ccu_data master_ccu_data = {
BCM21664_CCU_COMMON(master, MASTER),
.policy = {
@@ -145,6 +172,16 @@ static struct ccu_data master_ccu_data = {
KONA_CLK(master, sdio3_sleep, peri),
[BCM21664_MASTER_CCU_SDIO4_SLEEP] =
KONA_CLK(master, sdio4_sleep, peri),
+ [BCM21664_MASTER_CCU_SDIO1_AHB] =
+ KONA_CLK(master, sdio1_ahb, bus),
+ [BCM21664_MASTER_CCU_SDIO2_AHB] =
+ KONA_CLK(master, sdio2_ahb, bus),
+ [BCM21664_MASTER_CCU_SDIO3_AHB] =
+ KONA_CLK(master, sdio3_ahb, bus),
+ [BCM21664_MASTER_CCU_SDIO4_AHB] =
+ KONA_CLK(master, sdio4_ahb, bus),
+ [BCM21664_MASTER_CCU_USB_OTG_AHB] =
+ KONA_CLK(master, usb_otg_ahb, bus),
[BCM21664_MASTER_CCU_CLOCK_COUNT] = LAST_KONA_CLK,
},
};
@@ -225,6 +262,38 @@ static struct peri_clk_data bsc4_data = {
.trig = TRIGGER(0x0afc, 19),
};
+static struct bus_clk_data uartb_apb_data = {
+ .gate = HW_SW_GATE_AUTO(0x0400, 16, 0, 1),
+};
+
+static struct bus_clk_data uartb2_apb_data = {
+ .gate = HW_SW_GATE_AUTO(0x0404, 16, 0, 1),
+};
+
+static struct bus_clk_data uartb3_apb_data = {
+ .gate = HW_SW_GATE_AUTO(0x0408, 16, 0, 1),
+};
+
+static struct bus_clk_data bsc1_apb_data = {
+ .gate = HW_SW_GATE_AUTO(0x0458, 16, 0, 1),
+ .hyst = HYST(0x0458, 8, 9),
+};
+
+static struct bus_clk_data bsc2_apb_data = {
+ .gate = HW_SW_GATE_AUTO(0x045c, 16, 0, 1),
+ .hyst = HYST(0x045c, 8, 9),
+};
+
+static struct bus_clk_data bsc3_apb_data = {
+ .gate = HW_SW_GATE_AUTO(0x0470, 16, 0, 1),
+ .hyst = HYST(0x0470, 8, 9),
+};
+
+static struct bus_clk_data bsc4_apb_data = {
+ .gate = HW_SW_GATE_AUTO(0x0474, 16, 0, 1),
+ .hyst = HYST(0x0474, 8, 9),
+};
+
static struct ccu_data slave_ccu_data = {
BCM21664_CCU_COMMON(slave, SLAVE),
.policy = {
@@ -246,6 +315,20 @@ static struct ccu_data slave_ccu_data = {
KONA_CLK(slave, bsc3, peri),
[BCM21664_SLAVE_CCU_BSC4] =
KONA_CLK(slave, bsc4, peri),
+ [BCM21664_SLAVE_CCU_UARTB_APB] =
+ KONA_CLK(slave, uartb_apb, bus),
+ [BCM21664_SLAVE_CCU_UARTB2_APB] =
+ KONA_CLK(slave, uartb2_apb, bus),
+ [BCM21664_SLAVE_CCU_UARTB3_APB] =
+ KONA_CLK(slave, uartb3_apb, bus),
+ [BCM21664_SLAVE_CCU_BSC1_APB] =
+ KONA_CLK(slave, bsc1_apb, bus),
+ [BCM21664_SLAVE_CCU_BSC2_APB] =
+ KONA_CLK(slave, bsc2_apb, bus),
+ [BCM21664_SLAVE_CCU_BSC3_APB] =
+ KONA_CLK(slave, bsc3_apb, bus),
+ [BCM21664_SLAVE_CCU_BSC4_APB] =
+ KONA_CLK(slave, bsc4_apb, bus),
[BCM21664_SLAVE_CCU_CLOCK_COUNT] = LAST_KONA_CLK,
},
};
--
2.48.1
next prev parent reply other threads:[~2025-03-03 20:28 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-03 20:27 [PATCH v2 0/7] clk: bcm: kona: Add bus clock support, bus clocks for BCM21664/BCM281xx Artur Weber
2025-03-03 20:27 ` [PATCH v2 1/7] dt-bindings: clock: brcm,kona-ccu: Add BCM21664 bus clocks Artur Weber
2025-03-04 7:35 ` Krzysztof Kozlowski
2025-03-03 20:27 ` [PATCH v2 2/7] dt-bindings: clock: brcm,kona-ccu: Add BCM281xx " Artur Weber
2025-03-03 21:43 ` Rob Herring (Arm)
2025-03-04 7:35 ` Krzysztof Kozlowski
2025-03-04 20:22 ` Artur Weber
2025-03-03 20:27 ` [PATCH v2 3/7] clk: bcm: kona: Add support for " Artur Weber
2025-03-03 20:27 ` Artur Weber [this message]
2025-03-03 20:27 ` [PATCH v2 5/7] clk: bcm281xx: Add corresponding bus clocks for peripheral clocks Artur Weber
2025-03-03 20:27 ` [PATCH v2 6/7] ARM: dts: bcm2166x-common: Add matching " Artur Weber
2025-03-03 20:27 ` [PATCH v2 7/7] ARM: dts: bcm11351: Add corresponding " Artur Weber
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