[PATCH v2 0/3] dt-bindings: mips: lantiq: Document Lantiq Xway GPTU

[PATCH v2 0/3] dt-bindings: mips: lantiq: Document Lantiq Xway GPTU

[Aleksander Jan Bajkowski]

The Lantiq SoC has six built-in 16-bit general purpose timers (GPTU).

---
Changes in v2:
- added device-specific compatible
- added node name pattern
- added interrupt names
- added third patch
---
Aleksander Jan Bajkowski (3):
  dt-bindings: mips: lantiq: Document Lantiq Xway GPTU
  mips: lantiq: danube: add missing timer interrupts
  mips: lantiq: danube: add device-specified compatible in GPTU node

 .../mips/lantiq/lantiq,gptu-xway.yaml         | 67 +++++++++++++++++++
 arch/mips/boot/dts/lantiq/danube.dtsi         |  6 +-
 2 files changed, 72 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml

-- 
2.47.2

[PATCH v2 1/3] dt-bindings: mips: lantiq: Document Lantiq Xway GPTU

[Aleksander Jan Bajkowski]

The Lantiq SoC has six built-in 16-bit general purpose timers (GPTU).

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
 .../mips/lantiq/lantiq,gptu-xway.yaml         | 67 +++++++++++++++++++
 1 file changed, 67 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml

diff --git a/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml b/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
new file mode 100644
index 000000000000..fcbcd98def46
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mips/lantiq/lantiq,gptu-xway.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Lantiq Xway SoC series General Purpose Timer Unit (GPTU)
+
+maintainers:
+  - Aleksander Jan Bajkowski <olek2@wp.pl>
+
+description:
+  The Lantiq SoC has six built-in 16-bit general purpose timers. The voice
+  firmware needs these timers as a reference.
+
+properties:
+  $nodename:
+    pattern: "^gptu@[0-9a-f]+$"
+
+  compatible:
+    items:
+      - enum:
+          - lantiq,ase-gptu
+          - lantiq,danube-gptu
+          - lantiq,xrx100-gptu
+          - lantiq,xrx200-gptu
+      - const: lantiq,gptu-xway
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    items:
+      - description: timer1a interrupt
+      - description: timer1b interrupt
+      - description: timer2a interrupt
+      - description: timer2b interrupt
+      - description: timer3a interrupt
+      - description: timer3b interrupt
+
+  interrupt-names:
+    items:
+      - const: timer1a
+      - const: timer1b
+      - const: timer2a
+      - const: timer2b
+      - const: timer3a
+      - const: timer3b
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - interrupt-names
+
+additionalProperties: false
+
+examples:
+  - |
+    gptu@e100a00 {
+        compatible = "lantiq,ase-gptu", "lantiq,gptu-xway";
+        reg = <0xe100a00 0x100>;
+        interrupt-parent = <&icu0>;
+        interrupts = <126>, <127>, <128>, <129> ,<130>, <131>;
+        interrupt-names = "timer1a", "timer1b", "timer2a", "timer2b",
+                "timer3a", "timer3b";
+    };
-- 
2.47.2

Re: [PATCH v2 1/3] dt-bindings: mips: lantiq: Document Lantiq Xway GPTU

[Conor Dooley]

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On Sat, Aug 16, 2025 at 03:16:22PM +0200, Aleksander Jan Bajkowski wrote:
> The Lantiq SoC has six built-in 16-bit general purpose timers (GPTU).
> 
> Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
> ---
>  .../mips/lantiq/lantiq,gptu-xway.yaml         | 67 +++++++++++++++++++
>  1 file changed, 67 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
> 
> diff --git a/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml b/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
> new file mode 100644
> index 000000000000..fcbcd98def46
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
> @@ -0,0 +1,67 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mips/lantiq/lantiq,gptu-xway.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Lantiq Xway SoC series General Purpose Timer Unit (GPTU)
> +
> +maintainers:
> +  - Aleksander Jan Bajkowski <olek2@wp.pl>
> +
> +description:
> +  The Lantiq SoC has six built-in 16-bit general purpose timers. The voice
> +  firmware needs these timers as a reference.
> +
> +properties:
> +  $nodename:
> +    pattern: "^gptu@[0-9a-f]+$"

This is a timer, why are you not using "timer" as the prefix?
Otherwise, this looks okay to me other than...

> +
> +  compatible:
> +    items:
> +      - enum:
> +          - lantiq,ase-gptu
> +          - lantiq,danube-gptu
> +          - lantiq,xrx100-gptu
> +          - lantiq,xrx200-gptu
> +      - const: lantiq,gptu-xway

..the fact that my OCD hates how the fallback inverts the position of
gptu in the compatible!

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Re: [PATCH v2 1/3] dt-bindings: mips: lantiq: Document Lantiq Xway GPTU

[Krzysztof Kozlowski]

On Mon, Aug 18, 2025 at 06:38:24PM +0100, Conor Dooley wrote:
> On Sat, Aug 16, 2025 at 03:16:22PM +0200, Aleksander Jan Bajkowski wrote:
> > The Lantiq SoC has six built-in 16-bit general purpose timers (GPTU).
> > 
> > Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
> > ---
> >  .../mips/lantiq/lantiq,gptu-xway.yaml         | 67 +++++++++++++++++++
> >  1 file changed, 67 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml b/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
> > new file mode 100644
> > index 000000000000..fcbcd98def46
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
> > @@ -0,0 +1,67 @@
> > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/mips/lantiq/lantiq,gptu-xway.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Lantiq Xway SoC series General Purpose Timer Unit (GPTU)
> > +
> > +maintainers:
> > +  - Aleksander Jan Bajkowski <olek2@wp.pl>
> > +
> > +description:
> > +  The Lantiq SoC has six built-in 16-bit general purpose timers. The voice
> > +  firmware needs these timers as a reference.
> > +
> > +properties:
> > +  $nodename:
> > +    pattern: "^gptu@[0-9a-f]+$"
> 
> This is a timer, why are you not using "timer" as the prefix?
> Otherwise, this looks okay to me other than...
> 
> > +
> > +  compatible:
> > +    items:
> > +      - enum:
> > +          - lantiq,ase-gptu
> > +          - lantiq,danube-gptu
> > +          - lantiq,xrx100-gptu
> > +          - lantiq,xrx200-gptu
> > +      - const: lantiq,gptu-xway
> 
> ..the fact that my OCD hates how the fallback inverts the position of
> gptu in the compatible!

Recommended naming is soc-subblock, so xway-gptu, but even more
recommended (and documented...) is to use only soc compatibles.

If xway is the soc, where is separate entry for that (maybe missing in
email context?).

Best regards,
Krzysztof

[PATCH v2 2/3] mips: lantiq: danube: add missing timer interrupts

[Aleksander Jan Bajkowski]

The driver expects six interrupt lines to be specified.

Fixes: 30404aec4d09 ("MIPS: lantiq: adds support for gptu timers")
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
 arch/mips/boot/dts/lantiq/danube.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/mips/boot/dts/lantiq/danube.dtsi b/arch/mips/boot/dts/lantiq/danube.dtsi
index 7a7ba66aa534..8e92573aaf75 100644
--- a/arch/mips/boot/dts/lantiq/danube.dtsi
+++ b/arch/mips/boot/dts/lantiq/danube.dtsi
@@ -71,6 +71,10 @@ fpi@10000000 {
 		gptu@e100a00 {
 			compatible = "lantiq,gptu-xway";
 			reg = <0xe100a00 0x100>;
+			interrupt-parent = <&icu0>;
+			interrupts = <126 127 128 129 130 131>;
+			interrupt-names = "timer1a", "timer1b", "timer2a",
+				"timer2b", "timer3a", "timer3b";
 		};
 
 		serial@e100c00 {
-- 
2.47.2

[PATCH v2 3/3] mips: lantiq: danube: add device-specified compatible in GPTU node

[Aleksander Jan Bajkowski]

This patch adds device-specific compatibility in the GPTU node.

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
 arch/mips/boot/dts/lantiq/danube.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/boot/dts/lantiq/danube.dtsi b/arch/mips/boot/dts/lantiq/danube.dtsi
index 8e92573aaf75..d09276b31718 100644
--- a/arch/mips/boot/dts/lantiq/danube.dtsi
+++ b/arch/mips/boot/dts/lantiq/danube.dtsi
@@ -69,7 +69,7 @@ fpi@10000000 {
 		reg = <0x10000000 0xef00000>;
 
 		gptu@e100a00 {
-			compatible = "lantiq,gptu-xway";
+			compatible = "lantiq,danube-gptu", "lantiq,gptu-xway";
 			reg = <0xe100a00 0x100>;
 			interrupt-parent = <&icu0>;
 			interrupts = <126 127 128 129 130 131>;
-- 
2.47.2