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* [PATCH] dt-bindings: mfd: hisilicon,hi655x-pmic: Convert to DT schema
@ 2026-04-22 20:02 Shaunak Datar
  2026-04-22 21:22 ` Rob Herring (Arm)
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Shaunak Datar @ 2026-04-22 20:02 UTC (permalink / raw)
  To: lee, robh, krzk+dt, conor+dt
  Cc: devicetree, puck.chen, daniel.lezcano, Shaunak Datar

Convert the Hisilicon Hi655x PMIC binding from the text format to DT schema
to enable dtbs_check validation
Signed-off-by: Shaunak Datar <shaunakkdatar@gmail.com>
---
 .../bindings/mfd/hisilicon,hi655x-pmic.yaml   | 89 +++++++++++++++++++
 .../bindings/mfd/hisilicon,hi655x.txt         | 33 -------
 2 files changed, 89 insertions(+), 33 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hi655x-pmic.yaml
 delete mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt

diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x-pmic.yaml b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x-pmic.yaml
new file mode 100644
index 000000000000..1bed57003bd2
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x-pmic.yaml
@@ -0,0 +1,89 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/hisilicon,hi655x-pmic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Hisilicon Hi655x Power Management Integrated Circuit
+
+maintainers:
+  - Chen Feng <puck.chen@hisilicon.com>
+  - Daniel Lezcano <daniel.lezcano@kernel.org>
+
+description:
+  The hardware layout for access PMIC Hi655x from AP SoC Hi6220.
+  Between PMIC Hi655x and Hi6220, the physical signal channel is SSI.
+  We can use memory-mapped I/O to communicate.
+
+properties:
+  $nodename:
+    pattern: "pmic@[0-9a-f]"
+
+  compatible:
+    const: hisilicon,hi655x-pmic
+
+  reg:
+    maxItems: 1
+
+  interrupt-controller: true
+
+  '#interrupt-cells':
+    const: 2
+
+  pmic-gpios:
+    maxItems: 1
+    description: The GPIO used by PMIC IRQ
+
+  '#clock-cells':
+    const: 0
+
+  clock-output-names:
+    maxItems: 1
+
+  regulators:
+    type: object
+    additionalProperties: false
+
+    patternProperties:
+      '^LDO[0-9]+$':
+        type: object
+        $ref: /schemas/regulator/regulator.yaml#
+        unevaluatedProperties: false
+
+required:
+  - compatible
+  - reg
+  - interrupt-controller
+  - '#interrupt-cells'
+  - pmic-gpios
+  - '#clock-cells'
+  - regulators
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/gpio/gpio.h>
+
+    / {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        pmic: pmic@f8000000 {
+            compatible = "hisilicon,hi655x-pmic";
+            reg = <0x0 0xf8000000 0x0 0x1000>;
+            #clock-cells = <0>;
+            interrupt-controller;
+            #interrupt-cells = <2>;
+            pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+
+            regulators {
+                ldo2: LDO2 {
+                    regulator-name = "LDO2_2V8";
+                    regulator-min-microvolt = <2500000>;
+                    regulator-max-microvolt = <3200000>;
+                    regulator-enable-ramp-delay = <120>;
+                };
+            };
+        };
+    };
diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt
deleted file mode 100644
index 9630ac0e4b56..000000000000
--- a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt
+++ /dev/null
@@ -1,33 +0,0 @@
-Hisilicon Hi655x Power Management Integrated Circuit (PMIC)
-
-The hardware layout for access PMIC Hi655x from AP SoC Hi6220.
-Between PMIC Hi655x and Hi6220, the physical signal channel is SSI.
-We can use memory-mapped I/O to communicate.
-
-+----------------+             +-------------+
-|                |             |             |
-|    Hi6220      |   SSI bus   |   Hi655x    |
-|                |-------------|             |
-|                |(REGMAP_MMIO)|             |
-+----------------+             +-------------+
-
-Required properties:
-- compatible:           Should be "hisilicon,hi655x-pmic".
-- reg:                  Base address of PMIC on Hi6220 SoC.
-- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain).
-- pmic-gpios:           The GPIO used by PMIC IRQ.
-- #clock-cells:		From common clock binding; shall be set to 0
-
-Optional properties:
-- clock-output-names: From common clock binding to override the
-  default output clock name
-
-Example:
-	pmic: pmic@f8000000 {
-		compatible = "hisilicon,hi655x-pmic";
-		reg = <0x0 0xf8000000 0x0 0x1000>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
-		pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
-		#clock-cells = <0>;
-	}
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2026-04-25  9:51 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-04-22 20:02 [PATCH] dt-bindings: mfd: hisilicon,hi655x-pmic: Convert to DT schema Shaunak Datar
2026-04-22 21:22 ` Rob Herring (Arm)
2026-04-23  9:05 ` Krzysztof Kozlowski
2026-04-23 11:32 ` [PATCH v2] " Shaunak Datar
2026-04-25  9:51   ` Krzysztof Kozlowski

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