From: Abel Vesa <abel.vesa@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Conor Dooley <conor@kernel.org>,
Jonathan Cameron <jic23@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Abel Vesa <abel.vesa@oss.qualcomm.com>
Subject: [PATCH 0/2] soc: qcom: llcc-qcom: Add support for Eliza and document bindings
Date: Mon, 04 May 2026 13:00:06 +0300 [thread overview]
Message-ID: <20260504-eliza-llcc-v1-0-d7006c899812@oss.qualcomm.com> (raw)
Add support for the Last Level Cache Controller found on the Qualcomm
Eliza SoC.
Eliza's LLCC uses a 4-region register layout, with two per-bank base
regions plus the broadcast OR and AND windows.
Describe that layout in the devicetree bindings and add the corresponding
slice configuration and driver data in llcc-qcom.
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
---
Abel Vesa (2):
dt-bindings: cache: qcom,llcc: Document Eliza LLCC block
soc: qcom: llcc-qcom: Add support for Eliza
.../devicetree/bindings/cache/qcom,llcc.yaml | 22 +++
drivers/soc/qcom/llcc-qcom.c | 180 +++++++++++++++++++++
2 files changed, 202 insertions(+)
---
base-commit: b9303e6bff706758c167af686b5315ad00233bf8
change-id: 20260428-eliza-llcc-312b07fefc10
Best regards,
--
Abel Vesa <abel.vesa@oss.qualcomm.com>
next reply other threads:[~2026-05-04 10:00 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-04 10:00 Abel Vesa [this message]
2026-05-04 10:00 ` [PATCH 1/2] dt-bindings: cache: qcom,llcc: Document Eliza LLCC block Abel Vesa
2026-05-06 8:25 ` Krzysztof Kozlowski
2026-05-06 8:49 ` Konrad Dybcio
2026-05-06 9:56 ` Krzysztof Kozlowski
2026-05-06 10:47 ` Konrad Dybcio
2026-05-06 12:15 ` Krzysztof Kozlowski
2026-05-04 10:00 ` [PATCH 2/2] soc: qcom: llcc-qcom: Add support for Eliza Abel Vesa
2026-05-04 10:24 ` Konrad Dybcio
2026-05-04 10:39 ` Abel Vesa
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