From: John Madieu <john.madieu.xa@bp.renesas.com>
To: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>,
Mark Brown <broonie@kernel.org>,
Liam Girdwood <lgirdwood@gmail.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Claudiu Beznea <claudiu.beznea@tuxon.dev>,
Biju Das <biju.das.jz@bp.renesas.com>,
john.madieu@gmail.com, linux-sound@vger.kernel.org,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
John Madieu <john.madieu.xa@bp.renesas.com>
Subject: [PATCH v6 10/16] ASoC: rsnd: Add SSI reset support for RZ/G3E platform
Date: Tue, 12 May 2026 18:26:25 +0000 [thread overview]
Message-ID: <20260512182631.3842065-11-john.madieu.xa@bp.renesas.com> (raw)
In-Reply-To: <20260512182631.3842065-1-john.madieu.xa@bp.renesas.com>
Add SSI reset support for the Renesas RZ/G3E SoC, which differs from
earlier generations in several ways:
- The SSI block always operates in BUSIF mode; RZ/G3E does not
implement the SSITDR/SSIRDR registers used by R-Car Gen2/Gen3/Gen4
for direct SSI DMA. Consequently, for the RZ/G3E, all audio data
must pass through BUSIF. PIO mode remains available for R-Car
Gen2/Gen3/Gen4 platforms.
- Each SSI instance has its own reset line, exposed using per-SSI
names such as "ssi-0", "ssi-1", etc., rather than a single shared
reset.
To support these differences, rsnd_ssi_use_busif() always returns 1
on RZ/G3E, ensuring that the driver consistently selects the BUSIF
DMA path. While at it, acquire the per-SSI reset controller through
the indexed-name helper added earlier in the series, so the same code
accepts both the hyphenated RZ/G3E names and the legacy dotted names
used by R-Car.
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
---
Changes:
v6:
- Acquire the per-SSI reset through the new
rsnd_devm_reset_control_get_optional_indexed() helper from
patch 04/16, so the same code accepts both the hyphenated
RZ/G3E names ("ssi-0") and the legacy dotted names ("ssi.0").
- Rewrite the commit message accordingly.
v5: No changes
v4:
- Clarify in commit message that PIO mode remains available on
R-Car Gen2/Gen3/Gen4 platforms.
v3: No changes
v2: No changes
sound/soc/renesas/rcar/ssi.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/sound/soc/renesas/rcar/ssi.c b/sound/soc/renesas/rcar/ssi.c
index cf98cc9ee44c..e6734671328c 100644
--- a/sound/soc/renesas/rcar/ssi.c
+++ b/sound/soc/renesas/rcar/ssi.c
@@ -1157,6 +1157,7 @@ int __rsnd_ssi_is_pin_sharing(struct rsnd_mod *mod)
int rsnd_ssi_probe(struct rsnd_priv *priv)
{
+ struct reset_control *rstc;
struct device_node *node;
struct device *dev = rsnd_priv_to_dev(priv);
struct rsnd_mod_ops *ops;
@@ -1202,6 +1203,17 @@ int rsnd_ssi_probe(struct rsnd_priv *priv)
goto rsnd_ssi_probe_done;
}
+ /*
+ * RZ/G3E uses per-SSI reset controllers.
+ * R-Car platforms typically don't have SSI reset controls.
+ */
+ rstc = rsnd_devm_reset_control_get_optional_indexed(dev,
+ SSI_NAME, i);
+ if (IS_ERR(rstc)) {
+ ret = PTR_ERR(rstc);
+ goto rsnd_ssi_probe_done;
+ }
+
if (of_property_read_bool(np, "shared-pin"))
rsnd_flags_set(ssi, RSND_SSI_CLK_PIN_SHARE);
@@ -1220,7 +1232,7 @@ int rsnd_ssi_probe(struct rsnd_priv *priv)
ops = &rsnd_ssi_dma_ops;
ret = rsnd_mod_init(priv, rsnd_mod_get(ssi), ops, clk,
- NULL, RSND_MOD_SSI, i);
+ rstc, RSND_MOD_SSI, i);
if (ret)
goto rsnd_ssi_probe_done;
--
2.25.1
next prev parent reply other threads:[~2026-05-12 18:28 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-12 18:26 [PATCH v6 00/16] ASoC: rsnd: Add RZ/G3E audio driver support John Madieu
2026-05-12 18:26 ` [PATCH v6 01/16] ASoC: dt-bindings: sound: Add DT binding for RZ/G3E sound John Madieu
2026-05-12 18:26 ` [PATCH v6 02/16] ASoC: rsnd: Fix RSND_SOC_MASK width to single nibble John Madieu
2026-05-12 18:26 ` [PATCH v6 03/16] ASoC: rsnd: Add reset controller support to rsnd_mod John Madieu
2026-05-12 18:26 ` [PATCH v6 04/16] ASoC: rsnd: Support hyphen or dot in indexed clock and reset names John Madieu
2026-05-12 18:26 ` [PATCH v6 05/16] ASoC: rsnd: Add RZ/G3E SoC probing and register map John Madieu
2026-05-12 18:26 ` [PATCH v6 06/16] ASoC: rsnd: Add audmacpp clock and reset support for RZ/G3E John Madieu
2026-05-12 18:26 ` [PATCH v6 07/16] ASoC: rsnd: Refactor DMA address tables with named structs John Madieu
2026-05-12 18:26 ` [PATCH v6 08/16] ASoC: rsnd: Add RZ/G3E DMA address calculation support John Madieu
2026-05-12 18:26 ` [PATCH v6 09/16] ASoC: rsnd: ssui: Add RZ/G3E SSIU BUSIF support John Madieu
2026-05-13 0:35 ` Kuninori Morimoto
2026-05-13 5:04 ` John Madieu
2026-05-13 9:41 ` Geert Uytterhoeven
2026-05-12 18:26 ` John Madieu [this message]
2026-05-12 18:26 ` [PATCH v6 11/16] ASoC: rsnd: Add ADG reset support for RZ/G3E John Madieu
2026-05-12 18:26 ` [PATCH v6 12/16] ASoC: rsnd: adg: Add per-SSI ADG and SSIF supply clock management John Madieu
2026-05-12 18:26 ` [PATCH v6 13/16] ASoC: rsnd: adg: Look up RZ/G3E clkin under audio-clk{a,b,c,i} John Madieu
2026-05-12 18:26 ` [PATCH v6 14/16] ASoC: rsnd: src: Add SRC reset and clock support for RZ/G3E John Madieu
2026-05-13 0:44 ` Kuninori Morimoto
2026-05-13 5:17 ` John Madieu
2026-05-12 18:26 ` [PATCH v6 15/16] ASoC: rsnd: Support unprefixed DT node names " John Madieu
2026-05-12 18:26 ` [PATCH v6 16/16] ASoC: rsnd: Add system suspend/resume support John Madieu
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