Re: [PATCH v6 5/6] arm64: dts: qcom: sm8350: add Iris device

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Missing power domain management for `mmcx` in the fallback driver leads to voltage underruns at high frequencies.
- [Medium] Device Tree schema violation: `power-domains` count mismatch for `qcom,sm8250-venus` fallback.
--

commit bd1540a2aea97fb87b08697e9a713ca663a208e8
Author: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>

arm64: dts: qcom: sm8350: add Iris device

This commit adds the Iris video codec and video clock controller devices
to the SM8350 device tree, describing the Iris2 core present on this platform.

> diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> index 5c8fe213f5e4e..eedf677a7070d 100644
> --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
[ ... ]
> @@ -2745,6 +2747,85 @@ usb_2_dwc3: usb@a800000 {
>  			};
>  		};
>  
> +		iris: video-codec@aa00000 {
> +			compatible = "qcom,sm8350-iris", "qcom,sm8250-venus";
> +			reg = <0x0 0x0aa00000 0x0 0x100000>;
> +			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> +
> +			clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
> +				 <&videocc VIDEO_CC_MVS0C_CLK>,
> +				 <&videocc VIDEO_CC_MVS0_CLK>;
> +			clock-names = "iface",
> +				      "core",
> +				      "vcodec0_core";
> +			power-domains = <&videocc MVS0C_GDSC>,
> +					<&videocc MVS0_GDSC>,
> +					<&rpmhpd RPMHPD_MX>,
> +					<&rpmhpd RPMHPD_MMCX>;
> +			power-domain-names = "venus",
> +					     "vcodec0",
> +					     "mx",
> +					     "mmcx";

Does this configuration violate the device tree schema for the fallback
compatible?

The qcom,sm8250-venus schema limits power-domains to 3 items (venus, vcodec0,
mx). By adding mmcx as a fourth power domain without updating the
qcom,sm8250-venus schema, running make dtbs_check will result in validation
errors.

Furthermore, because the kernel lacks explicit driver match data for
qcom,sm8350-iris, the device will bind using the fallback qcom,sm8250-venus
compatible.

The driver configuration for sm8250 strictly requests and attaches only a
single OPP-scaled power domain (mx), completely ignoring mmcx. This means
mmcx will not be dynamically scaled by the PM OPP core and will remain at its
static initial voltage (likely low_svs, as requested by the videocc clock
controller).

[ ... ]
> +				opp-444000000 {
> +					opp-hz = /bits/ 64 <444000000>;
> +					required-opps = <&rpmhpd_opp_svs_l1>,
> +							<&rpmhpd_opp_nom>;
> +				};

Will this cause a voltage underrun when scaling to higher frequencies?

When the hardware scales to 444MHz, the opp-table mandates that mmcx
requires nom voltage. Running at 444MHz while mmcx is starved at low_svs
due to being unmanaged by the sm8250 driver configuration could lead to
hardware instability, crashes, or synchronous external aborts.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260513-iris-sc8280xp-v6-0-0d11d90d3e26@oss.qualcomm.com?part=5