From: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
Manivannan Sadhasivam <mani@kernel.org>
Subject: [PATCH 10/18] arm64: dts: qcom: sm8650: Fix PCIe wake GPIO polarity
Date: Thu, 21 May 2026 18:36:43 +0530 [thread overview]
Message-ID: <20260521-wake-v1-10-d822567be258@oss.qualcomm.com> (raw)
In-Reply-To: <20260521-wake-v1-0-d822567be258@oss.qualcomm.com>
The PCIe WAKE# signal is active-low as defined in the PCIe Base
Specification. Fix the wake-gpios polarity by using GPIO_ACTIVE_LOW
instead of GPIO_ACTIVE_HIGH.
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
---
arch/arm64/boot/dts/qcom/sm8650-ayaneo-pocket-s2.dts | 4 ++--
arch/arm64/boot/dts/qcom/sm8650-hdk.dts | 4 ++--
arch/arm64/boot/dts/qcom/sm8650-mtp.dts | 4 ++--
arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 2 +-
4 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8650-ayaneo-pocket-s2.dts b/arch/arm64/boot/dts/qcom/sm8650-ayaneo-pocket-s2.dts
index 0dc994f4e48d..2123312d88f6 100644
--- a/arch/arm64/boot/dts/qcom/sm8650-ayaneo-pocket-s2.dts
+++ b/arch/arm64/boot/dts/qcom/sm8650-ayaneo-pocket-s2.dts
@@ -1074,7 +1074,7 @@ &mdss_dp0_out {
};
&pcie0 {
- wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 96 GPIO_ACTIVE_LOW>;
perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie0_default_state>;
@@ -1108,7 +1108,7 @@ &pcie0_phy {
};
&pcie1 {
- wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>;
perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie1_default_state>;
diff --git a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
index eabc828c05b4..775ce9f2dba0 100644
--- a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
@@ -942,7 +942,7 @@ &mdss_dp0 {
};
&pcie0 {
- wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 96 GPIO_ACTIVE_LOW>;
perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie0_default_state>;
@@ -976,7 +976,7 @@ &pcie0_phy {
};
&pcie1 {
- wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>;
perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie1_default_state>;
diff --git a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
index dd6e33d2dc5d..8cc0d2cb3515 100644
--- a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
@@ -642,7 +642,7 @@ &mdss_dsi0_phy {
};
&pcie0 {
- wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 96 GPIO_ACTIVE_LOW>;
perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie0_default_state>;
@@ -659,7 +659,7 @@ &pcie0_phy {
};
&pcie1 {
- wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>;
perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie1_default_state>;
diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
index a3982ae22929..c302996a7857 100644
--- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
+++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
@@ -936,7 +936,7 @@ &mdss_dp0 {
};
&pcie0 {
- wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 96 GPIO_ACTIVE_LOW>;
perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie0_default_state>;
--
2.34.1
next prev parent reply other threads:[~2026-05-21 13:07 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-21 13:06 [PATCH 00/18] arm64: dts: qcom: Fix PCIe wake GPIO polarity Krishna Chaitanya Chundru
2026-05-21 13:06 ` [PATCH 01/18] ARM: dts: qcom: sdx55: " Krishna Chaitanya Chundru
2026-05-21 13:06 ` [PATCH 02/18] arm64: dts: qcom: msm8996: " Krishna Chaitanya Chundru
2026-05-21 13:06 ` [PATCH 03/18] arm64: dts: qcom: sdm845: " Krishna Chaitanya Chundru
2026-05-21 13:06 ` [PATCH 04/18] arm64: dts: qcom: sc8180x: " Krishna Chaitanya Chundru
2026-05-21 13:06 ` [PATCH 05/18] arm64: dts: qcom: sm8150: " Krishna Chaitanya Chundru
2026-05-21 13:42 ` sashiko-bot
2026-05-21 13:06 ` [PATCH 06/18] arm64: dts: qcom: sm8250: " Krishna Chaitanya Chundru
2026-05-21 13:06 ` [PATCH 07/18] arm64: dts: qcom: sm8350: " Krishna Chaitanya Chundru
2026-05-21 13:06 ` [PATCH 08/18] arm64: dts: qcom: sm8450: " Krishna Chaitanya Chundru
2026-05-21 13:06 ` [PATCH 09/18] arm64: dts: qcom: sm8550: " Krishna Chaitanya Chundru
2026-05-21 13:06 ` Krishna Chaitanya Chundru [this message]
2026-05-21 13:06 ` [PATCH 11/18] arm64: dts: qcom: sm8750: " Krishna Chaitanya Chundru
2026-05-21 13:06 ` [PATCH 12/18] arm64: dts: qcom: kaanapali: " Krishna Chaitanya Chundru
2026-05-21 13:06 ` [PATCH 13/18] arm64: dts: qcom: sar2130p: " Krishna Chaitanya Chundru
2026-05-21 13:06 ` [PATCH 14/18] arm64: dts: qcom: monaco: " Krishna Chaitanya Chundru
2026-05-21 13:06 ` [PATCH 15/18] arm64: dts: qcom: lemans: " Krishna Chaitanya Chundru
2026-05-21 13:06 ` [PATCH 16/18] arm64: dts: qcom: sa8540p-ride: " Krishna Chaitanya Chundru
2026-05-21 13:06 ` [PATCH 17/18] arm64: dts: qcom: kodiak: " Krishna Chaitanya Chundru
2026-05-21 13:06 ` [PATCH 18/18] arm64: dts: qcom: talos: " Krishna Chaitanya Chundru
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