Re: [PATCH 05/18] arm64: dts: qcom: sm8150: Fix PCIe wake GPIO polarity

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The dt-binding examples for Qualcomm PCIe controllers are not updated to reflect the `wake-gpios` polarity change.
--

commit ceea67812f2db3dd214265d1322e7b8e9c36e293
Author: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>

arm64: dts: qcom: sm8150: Fix PCIe wake GPIO polarity

The PCIe WAKE# signal is active-low as defined in the PCIe Base
Specification. Fix the wake-gpios polarity by using GPIO_ACTIVE_LOW
instead of GPIO_ACTIVE_HIGH.

> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 0e101096209ab..8da494de4308a 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -1905,7 +1905,7 @@ pcie0: pcie@1c00000 {
>  			phy-names = "pciephy";
>  
>  			perst-gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
> -			wake-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
> +			wake-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;

[Severity: Low]
Should the dt-binding example for this controller be updated to reflect the
polarity change?

The example in Documentation/devicetree/bindings/pci/qcom,pcie-sm8150.yaml
still instructs developers to use GPIO_ACTIVE_HIGH for wake-gpios. Leaving
the documentation with the old polarity risks propagating the incorrect
configuration to new board designs.

>  
>  			pinctrl-names = "default";
>  			pinctrl-0 = <&pcie0_default_state>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260521-wake-v1-0-d822567be258@oss.qualcomm.com?part=5