[PATCH 0/2] iio: adc: ad4080: add support for AD4884

[PATCH 0/2] iio: adc: ad4080: add support for AD4884

[Antoniu Miclaus]

Add support for the AD4884, a dual-channel, 16-bit, 40 MSPS SAR ADC,
to the ad4080 driver family.

Patch 1 adds the AD4884 compatible string to the devicetree binding.
Patch 2 adds the chip info and device ID to the driver.

Antoniu Miclaus (2):
  dt-bindings: iio: adc: ad4080: add AD4884 support
  iio: adc: ad4080: add support for AD4884

 .../bindings/iio/adc/adi,ad4080.yaml           |  5 ++++-
 drivers/iio/adc/ad4080.c                       | 18 ++++++++++++++++++
 2 files changed, 22 insertions(+), 1 deletion(-)

-- 
2.43.0

[PATCH 1/2] dt-bindings: iio: adc: ad4080: add AD4884 support

[Antoniu Miclaus]

Add AD4884 compatible string to the AD4080 devicetree binding.

The AD4884 is a dual-channel, 16-bit, 40 MSPS SAR ADC, sharing the same
register map and interface as the AD4080 family. Like the AD4880, it
requires two SPI chip selects and two io-backends for its independent
ADC channels.

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
 Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
index 9c6a56c7c8ef..4a3f7d3e05c3 100644
--- a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
@@ -39,6 +39,7 @@ properties:
       - adi,ad4087
       - adi,ad4088
       - adi,ad4880
+      - adi,ad4884
 
   reg:
     minItems: 1
@@ -99,7 +100,9 @@ allOf:
       properties:
         compatible:
           contains:
-            const: adi,ad4880
+            enum:
+              - adi,ad4880
+              - adi,ad4884
     then:
       properties:
         reg:
-- 
2.43.0

Re: [PATCH 1/2] dt-bindings: iio: adc: ad4080: add AD4884 support

[Jonathan Cameron]

On Fri, 22 May 2026 14:53:36 +0300
Antoniu Miclaus <antoniu.miclaus@analog.com> wrote:

> Add AD4884 compatible string to the AD4080 devicetree binding.
> 
> The AD4884 is a dual-channel, 16-bit, 40 MSPS SAR ADC, sharing the same
> register map and interface as the AD4080 family. Like the AD4880, it
> requires two SPI chip selects and two io-backends for its independent
> ADC channels.

I don't see anything in here to say how it is different in a fashion
that doesn't allow a fall back compatible to the ad4880. Probably just
needs a statement about the resolution being different. 

> 
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> ---
>  Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
> index 9c6a56c7c8ef..4a3f7d3e05c3 100644
> --- a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
> +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
> @@ -39,6 +39,7 @@ properties:
>        - adi,ad4087
>        - adi,ad4088
>        - adi,ad4880
> +      - adi,ad4884
>  
>    reg:
>      minItems: 1
> @@ -99,7 +100,9 @@ allOf:
>        properties:
>          compatible:
>            contains:
> -            const: adi,ad4880
> +            enum:
> +              - adi,ad4880
> +              - adi,ad4884
>      then:
>        properties:
>          reg:

Re: [PATCH 1/2] dt-bindings: iio: adc: ad4080: add AD4884 support

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 1794 bytes --]

On Fri, May 22, 2026 at 01:32:28PM +0100, Jonathan Cameron wrote:
> On Fri, 22 May 2026 14:53:36 +0300
> Antoniu Miclaus <antoniu.miclaus@analog.com> wrote:
> 
> > Add AD4884 compatible string to the AD4080 devicetree binding.
> > 
> > The AD4884 is a dual-channel, 16-bit, 40 MSPS SAR ADC, sharing the same
> > register map and interface as the AD4080 family. Like the AD4880, it
> > requires two SPI chip selects and two io-backends for its independent
> > ADC channels.
> 
> I don't see anything in here to say how it is different in a fashion
> that doesn't allow a fall back compatible to the ad4880. Probably just
> needs a statement about the resolution being different. 

With one,
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable

> 
> > 
> > Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> > ---
> >  Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 5 ++++-
> >  1 file changed, 4 insertions(+), 1 deletion(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
> > index 9c6a56c7c8ef..4a3f7d3e05c3 100644
> > --- a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
> > +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
> > @@ -39,6 +39,7 @@ properties:
> >        - adi,ad4087
> >        - adi,ad4088
> >        - adi,ad4880
> > +      - adi,ad4884
> >  
> >    reg:
> >      minItems: 1
> > @@ -99,7 +100,9 @@ allOf:
> >        properties:
> >          compatible:
> >            contains:
> > -            const: adi,ad4880
> > +            enum:
> > +              - adi,ad4880
> > +              - adi,ad4884
> >      then:
> >        properties:
> >          reg:
> 

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[PATCH 2/2] iio: adc: ad4080: add support for AD4884

[Antoniu Miclaus]

Add support for the AD4884, a dual-channel, 16-bit, 40 MSPS SAR ADC.

The AD4884 is the dual-channel variant of the AD4084, sharing the same
register map and SPI interface as the rest of the AD4080 family. Like
the AD4880, it uses two independent ADC channels, each with its own SPI
configuration interface.

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
 drivers/iio/adc/ad4080.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
index 265d85ac171a..764d49eca9e0 100644
--- a/drivers/iio/adc/ad4080.c
+++ b/drivers/iio/adc/ad4080.c
@@ -136,6 +136,7 @@
 #define AD4087_CHIP_ID						0x0057
 #define AD4088_CHIP_ID						0x0058
 #define AD4880_CHIP_ID						0x0750
+#define AD4884_CHIP_ID						0x005C
 
 #define AD4080_MAX_CHANNELS					2
 
@@ -541,6 +542,11 @@ static const struct iio_chan_spec ad4880_channels[] = {
 	AD4880_CHANNEL_DEFINE(20, 32, 1),
 };
 
+static const struct iio_chan_spec ad4884_channels[] = {
+	AD4880_CHANNEL_DEFINE(16, 16, 0),
+	AD4880_CHANNEL_DEFINE(16, 16, 1),
+};
+
 static const struct ad4080_chip_info ad4080_chip_info = {
 	.name = "ad4080",
 	.product_id = AD4080_CHIP_ID,
@@ -641,6 +647,16 @@ static const struct ad4080_chip_info ad4880_chip_info = {
 	.lvds_cnv_clk_cnt_max = AD4080_LVDS_CNV_CLK_CNT_MAX,
 };
 
+static const struct ad4080_chip_info ad4884_chip_info = {
+	.name = "ad4884",
+	.product_id = AD4884_CHIP_ID,
+	.scale_table = ad4080_scale_table,
+	.num_scales = ARRAY_SIZE(ad4080_scale_table),
+	.num_channels = 2,
+	.channels = ad4884_channels,
+	.lvds_cnv_clk_cnt_max = 2,
+};
+
 static int ad4080_setup_channel(struct ad4080_state *st, unsigned int ch)
 {
 	struct device *dev = regmap_get_device(st->regmap[ch]);
@@ -843,6 +859,7 @@ static const struct spi_device_id ad4080_id[] = {
 	{ "ad4087", (kernel_ulong_t)&ad4087_chip_info },
 	{ "ad4088", (kernel_ulong_t)&ad4088_chip_info },
 	{ "ad4880", (kernel_ulong_t)&ad4880_chip_info },
+	{ "ad4884", (kernel_ulong_t)&ad4884_chip_info },
 	{ }
 };
 MODULE_DEVICE_TABLE(spi, ad4080_id);
@@ -858,6 +875,7 @@ static const struct of_device_id ad4080_of_match[] = {
 	{ .compatible = "adi,ad4087", &ad4087_chip_info },
 	{ .compatible = "adi,ad4088", &ad4088_chip_info },
 	{ .compatible = "adi,ad4880", &ad4880_chip_info },
+	{ .compatible = "adi,ad4884", &ad4884_chip_info },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, ad4080_of_match);
-- 
2.43.0

Re: [PATCH 2/2] iio: adc: ad4080: add support for AD4884

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] Incorrect IIO scale calculation results in a factor of 1000 error for exposed voltage scales.
--

commit ec9f31937338c4b8462c0623182623b90d6e39ad
Author: Antoniu Miclaus <antoniu.miclaus@analog.com>

iio: adc: ad4080: add support for AD4884
    
Add support for the AD4884, a dual-channel, 16-bit, 40 MSPS SAR ADC.

> diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
> index 265d85ac171a9..764d49eca9e0e 100644
> --- a/drivers/iio/adc/ad4080.c
> +++ b/drivers/iio/adc/ad4080.c
[ ... ]
> @@ -541,6 +542,11 @@ static const struct iio_chan_spec ad4880_channels[] = {
>  	AD4880_CHANNEL_DEFINE(20, 32, 1),
>  };
>  
> +static const struct iio_chan_spec ad4884_channels[] = {
> +	AD4880_CHANNEL_DEFINE(16, 16, 0),
> +	AD4880_CHANNEL_DEFINE(16, 16, 1),
> +};
> +

[Severity: High]
This isn't a bug introduced by this patch, but I noticed that when the channel
exposes the scale attribute, the calculation in ad4080_get_scale() seems
mathematically incorrect:

drivers/iio/adc/ad4080.c:ad4080_get_scale() {
	unsigned int tmp;

	tmp = (st->info->scale_table[0][0] * 1000000ULL) >>
		    st->info->channels[0].scan_type.realbits;
	*val = tmp / 1000000;
	*val2 = tmp % 1000000;

	return IIO_VAL_INT_PLUS_NANO;
}

Since the fraction is calculated by multiplying by 1,000,000 and then using
modulo 1,000,000, val2 holds micro units.

However, IIO_VAL_INT_PLUS_NANO tells the IIO core to format val2 as nano
units (billionths).

Does this mismatch cause the sysfs scale attribute to expose a value that is
exactly 1000 times smaller than intended for these channels?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260522115337.18188-1-antoniu.miclaus@analog.com?part=2

Re: [PATCH 2/2] iio: adc: ad4080: add support for AD4884

[Jonathan Cameron]

On Fri, 22 May 2026 14:53:37 +0300
Antoniu Miclaus <antoniu.miclaus@analog.com> wrote:

> Add support for the AD4884, a dual-channel, 16-bit, 40 MSPS SAR ADC.
> 
> The AD4884 is the dual-channel variant of the AD4084, sharing the same
> register map and SPI interface as the rest of the AD4080 family. Like
> the AD4880, it uses two independent ADC channels, each with its own SPI
> configuration interface.
> 
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
LGTM.