Re: [PATCH v7 4/5] ARM: dts: microchip: add I3C controller

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Missing '#address-cells' and '#size-cells' in I3C controller DT node
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commit 6a4a77f4bd5c6126a185a06e30b920a5e43d4eb6
Author: Durai Manickam KR <durai.manickamkr@microchip.com>

ARM: dts: microchip: add I3C controller

This commit adds the I3C controller device tree node for the sama7d65 SoC.

> diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
> --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
> +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
> @@ -1055,5 +1055,13 @@ gic: interrupt-controller@e8c11000 {
[ ... ]
> +		i3c: i3c@e9000000 {
> +			compatible = "microchip,sama7d65-i3c-hci";
> +			reg = <0xe9000000 0x300>;
> +			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&pmc PMC_TYPE_PERIPHERAL 105>, <&pmc PMC_TYPE_GCK 105>;

[Severity: Low]
Are the #address-cells and #size-cells properties missing for this node?
The MIPI I3C HCI schema inherits from the core I3C schema, which typically
requires #address-cells to be 3 and #size-cells to be 0.

Without these properties, dtbs_check validation might fail, and the OF core
could have trouble parsing addresses for any child devices added when this
controller is enabled in a board file.

> +			status = "disabled";
> +		};
>  	};
>  };

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Sashiko AI review · https://sashiko.dev/#/patchset/20260525092405.1514213-1-manikandan.m@microchip.com?part=4