Re: [PATCH 1/3] arm64: dts: renesas: r9a09g077: Add xSPI nodes

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] The xSPI nodes provide fewer clocks and resets than strictly required by the fallback compatible string 'renesas,r9a09g047-xspi', causing dtbs_check validation failures and breaking the hardware compatibility contract.
- [Low] Inconsistent numeric formatting in the 'resets' property between xspi0 and xspi1.
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commit 5e178072e3e48c6e7ba03bbaf8ea699cb37031c4
Author: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

arm64: dts: renesas: r9a09g077: Add xSPI nodes

This commit adds device tree nodes for the two xSPI (Expanded SPI)
controllers integrated into the RZ/T2H (R9A09G077) SoC.

> diff --git a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
> --- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
[ ... ]
> +		xspi0: spi@801c0000 {
> +			compatible = "renesas,r9a09g077-xspi", "renesas,r9a09g047-xspi";
> +			reg = <0 0x801c0000 0 0x1000>,
> +			      <0 0x40000000 0 0x10000000>;
> +			reg-names = "regs", "dirmap";
> +			interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "pulse", "err_pulse";
> +			clocks = <&cpg CPG_MOD 4>,
> +				 <&cpg CPG_CORE R9A09G077_XSPI_CLK0>;
> +			clock-names = "ahb", "spi";
> +			resets = <&cpg 0x4>;

[Severity: Medium]
Will this trigger validation errors during make dtbs_check?

The fallback compatible string renesas,r9a09g047-xspi typically requires
exactly 4 clocks (ahb, axi, spi, spix2) and 2 resets (hresetn, aresetn) in
its bindings schema. Since these nodes only provide 2 clocks and 1 reset,
does this break the hardware compatibility contract expected by older
software?

Should there be a corresponding dt-bindings schema update to document the
new compatible string and relax these resource constraints?

> +			reset-names = "hresetn";
> +			power-domains = <&cpg>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
> +		xspi1: spi@801c1000 {
[ ... ]
> +			clock-names = "ahb", "spi";
> +			resets = <&cpg 5>;

[Severity: Low]
This isn't a bug, but the reset index is formatted as a decimal here,
whereas the xspi0 node above uses hexadecimal (0x4). Would it be better
to use consistent numeric formatting across adjacent, identical hardware
block definitions?

> +			reset-names = "hresetn";
> +			power-domains = <&cpg>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260526204045.3481604-1-prabhakar.mahadev-lad.rj@bp.renesas.com?part=1