Re: [PATCH v2 2/4] dt-bindings: pinctrl: qcom,pmic-gpio: Add level-shifter function

[Krzysztof Kozlowski <krzk@kernel.org>]

On Thu, May 28, 2026 at 06:05:36PM -0700, Fenglin Wu wrote:
> Add the "level-shifter" function and add the required DT properties to
> allow RPMh firmware to control the level-shifter. Introduce a custom
> pinconf parameter "qcom,1p2v-1p8v-ls-en" for enabling or disabling the
> level-shifter function.

I don't get how PMIC, which is not a child of RPMh at all or not
talking with RPMh RSC, needs to configure its pin via RPMh. It feels it
is misrepresented.

> 
> Additionally, add the "groups" property with the allowed group names
> that can be used to control the level-shifter function on pmh0101.
> 
> Signed-off-by: Fenglin Wu <fenglin.wu@oss.qualcomm.com>
> ---
>  .../bindings/pinctrl/qcom,pmic-gpio.yaml           | 66 +++++++++++++++++++++-
>  include/dt-bindings/pinctrl/qcom,pmic-gpio.h       |  1 +
>  2 files changed, 64 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml
> index b8109e6c2a10..19dc61ddff2d 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml
> @@ -119,6 +119,21 @@ properties:
>        The first cell will be used to define gpio number and the
>        second denotes the flags for this gpio
>  
> +  qcom,rpmh:
> +    description:
> +      Phandle to the RPMh controller device. Required for PMICs when the
> +      bidirectional level shifters is used (e.g., pmh0101), to enable
> +      communication with RPMh firmware for level shifter control.
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +
> +  qcom,pmic-id:
> +    description:
> +      The ID of the PMIC which supports bidirectional level shifter function.
> +      It is used as the RPMh resource name suffix to request control of the
> +      level shifter to the RPMh firmware.
> +    $ref: /schemas/types.yaml#/definitions/string
> +    pattern: "^[A-N]_E[0-3]+$"

You do not get instance IDs (it's explcitly documented in docs).

> +
>  additionalProperties: false
>  
>  required:
> @@ -330,6 +345,22 @@ allOf:
>            contains:
>              enum:
>                - qcom,pmh0101-gpio
> +    then:
> +      properties:
> +        gpio-line-names:
> +          minItems: 18
> +          maxItems: 18
> +        gpio-reserved-ranges:
> +          minItems: 1
> +          maxItems: 9
> +        qcom,rpmh: true
> +        qcom,pmic-id: true
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
>                - qcom,pmih0108-gpio
>      then:
>        properties:
> @@ -523,6 +554,19 @@ $defs:
>          items:
>            pattern: '^gpio([0-9]+)$'
>  
> +      groups:
> +        $ref: /schemas/types.yaml#/definitions/string-array
> +        description:
> +          List of GPIO groups to apply properties to. Only valid for
> +          function "level-shifter" on pmh0101. Valid groups are
> +          gpio11, gpio12; gpio13, gpio14; gpio15, gpio16; gpio17, gpio18.
> +        items:
> +          enum:
> +            - gpio11, gpio12
> +            - gpio13, gpio14
> +            - gpio15, gpio16
> +            - gpio17, gpio18
> +
>        function:
>          items:
>            - enum:
> @@ -536,6 +580,7 @@ $defs:
>                - dtest4
>                - func3  # supported by LV/MV GPIO subtypes
>                - func4  # supported by LV/MV GPIO subtypes
> +              - level-shifter  # supported only by pmh0101
>  
>        bias-disable: true
>        bias-pull-down: true
> @@ -592,9 +637,24 @@ $defs:
>            configured as digital input.
>          enum: [1, 2, 3, 4]
>  
> -    required:
> -      - pins
> -      - function
> +      qcom,1p2v-1p8v-ls-en:
> +        $ref: /schemas/types.yaml#/definitions/uint32
> +        description:
> +          Enable or disable the bidirectional 1.2V/1.8V level shifter
> +          associated with the specified GPIO group. When set to 1, an RPMh
> +          vote is sent to AOP to enable the level shifter. When set to 0,
> +          the vote is withdrawn. Only valid when function is "level-shifter"
> +          and groups is a level-shifter GPIO pair (e.g., "gpio11, gpio12"
> +          on pmh0101).

And there are no generic pinconf properties defining the voltage?

Best regards,
Krzysztof