* [PATCH 3/4] arm64: dts: qcom: qcs6490-rb3gen2-industrial-mezzanine: Add QCC2072 Bluetooth M.2 overlay
@ 2026-05-29 18:02 Yepuri Siddu
2026-05-30 1:27 ` sashiko-bot
0 siblings, 1 reply; 2+ messages in thread
From: Yepuri Siddu @ 2026-05-29 18:02 UTC (permalink / raw)
To: Bartosz Golaszewski, Marcel Holtmann, Luiz Augusto von Dentz,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, Balakrishna Godavarthi, Rocky Liao
Cc: quic_mohamull, quic_hbandi, rahul.samana, harshitha.reddy,
dishank.garg, linux-arm-msm, devicetree, linux-kernel,
Yepuri Siddu
Add a DTSO overlay for the M.2 E-key slot on the QCS6490 RB3 Gen2
industrial mezzanine board when populated with a QCC2072 Bluetooth
module.
The overlay configures UART4 (gpio16-19) for Bluetooth communication
at up to 3.2 Mbps. Sleep pin states are defined for all four UART
lines to minimize power consumption when Bluetooth is inactive. Host
wakeup is handled via a GPIO interrupt on the RX line (gpio19), and
SW_CTRL is mapped to gpio86 for power sequencing.
Disable UART7 in the base industrial mezzanine overlay as it is
not used when the M.2 slot is populated.
Signed-off-by: Yepuri Siddu <yepuri.siddu@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/Makefile | 2 +
...3gen2-industrial-mezzanine-m2-cologne.dtso | 110 ++++++++++++++++++
.../qcs6490-rb3gen2-industrial-mezzanine.dtso | 4 +
3 files changed, 116 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine-m2-cologne.dtso
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 4ba8e7306419..98b2d6402a26 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -173,8 +173,10 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb
qcs6490-rb3gen2-vision-mezzanine-dtbs := qcs6490-rb3gen2.dtb qcs6490-rb3gen2-vision-mezzanine.dtbo
qcs6490-rb3gen2-industrial-mezzanine-dtbs := qcs6490-rb3gen2.dtb qcs6490-rb3gen2-industrial-mezzanine.dtbo
+qcs6490-rb3gen2-industrial-mezzanine-m2-cologne-dtbs := qcs6490-rb3gen2.dtb qcs6490-rb3gen2-industrial-mezzanine.dtbo qcs6490-rb3gen2-industrial-mezzanine-m2-cologne.dtbo
dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-industrial-mezzanine.dtb
+dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-industrial-mezzanine-m2-cologne.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-vision-mezzanine.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs6490-thundercomm-minipc-g1iot.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs6490-thundercomm-rubikpi3.dtb
diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine-m2-cologne.dtso b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine-m2-cologne.dtso
new file mode 100644
index 000000000000..905a40f4b938
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine-m2-cologne.dtso
@@ -0,0 +1,110 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2026, Qualcomm Innovation Center, Inc. All rights reserved.
+*/
+
+/dts-v1/;
+/plugin/;
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+&tlmm {
+ qup_uart4_sleep_cts: qup-uart4-sleep-cts-state {
+ pins = "gpio16";
+ function = "gpio";
+ /*
+ * Configure a bias-bus-hold on CTS to lower power
+ * usage when Bluetooth is turned off. Bus hold will
+ * maintain a low power state regardless of whether
+ * the Bluetooth module drives the pin in either
+ * direction or leaves the pin fully unpowered.
+ */
+ bias-bus-hold;
+ };
+
+ qup_uart4_sleep_rts: qup-uart4-sleep-rts-state {
+ pins = "gpio17";
+ function = "gpio";
+ /*
+ * Configure pull-down on RTS. As RTS is active low
+ * signal, pull it low to indicate the BT SoC that it
+ * can wakeup the system anytime from suspend state by
+ * pulling RX low (by sending wakeup bytes).
+ */
+ bias-pull-down;
+ };
+
+ qup_uart4_sleep_rx: qup-uart4-sleep-rx-state {
+ pins = "gpio19";
+ function = "gpio";
+ /*
+ * Configure a pull-up on RX. This is needed to avoid
+ * garbage data when the TX pin of the Bluetooth module
+ * is floating which may cause spurious wakeups.
+ */
+ bias-pull-up;
+ };
+
+ qup_uart4_sleep_tx: qup-uart4-sleep-tx-state {
+ pins = "gpio18";
+ function = "gpio";
+ /*
+ * Configure pull-up on TX when it isn't actively driven
+ * to prevent BT SoC from receiving garbage during sleep.
+ */
+ bias-pull-up;
+ };
+
+ sw_ctrl: sw-ctrl-state {
+ pins = "gpio86";
+ function = "gpio";
+ bias-pull-down;
+ };
+};
+
+&qup_uart4_cts {
+ /*
+ * Configure a bias-bus-hold on CTS to lower power
+ * usage when Bluetooth is turned off. Bus hold will
+ * maintain a low power state regardless of whether
+ * the Bluetooth module drives the pin in either
+ * direction or leaves the pin fully unpowered.
+ */
+ bias-bus-hold;
+};
+
+&qup_uart4_rts {
+ /* We'll drive RTS, so no pull */
+ drive-strength = <2>;
+ bias-disable;
+};
+
+&qup_uart4_rx {
+ /*
+ * Configure a pull-up on RX. This is needed to avoid
+ * garbage data when the TX pin of the Bluetooth module is
+ * in tri-state (module powered off or not driving the
+ * signal yet).
+ */
+ bias-pull-up;
+};
+
+&qup_uart4_tx {
+ /* We'll drive TX, so no pull */
+ drive-strength = <2>;
+ bias-disable;
+};
+
+&uart4 {
+ status = "okay";
+ /delete-property/ interrupts;
+ interrupts-extended = <&intc GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>,
+ <&tlmm 19 IRQ_TYPE_EDGE_FALLING>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-1 = <&qup_uart4_sleep_cts>, <&qup_uart4_sleep_rts>,
+ <&qup_uart4_sleep_tx>, <&qup_uart4_sleep_rx>;
+
+ bluetooth: bluetooth {
+ compatible = "qcom,qcc2072-bt";
+ max-speed = <3200000>;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso
index 83908db335af..c96c7f52ea7a 100644
--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso
+++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso
@@ -288,3 +288,7 @@ pcie1_tc9563_resx_n: pcie1-tc9563-resx-state {
&wifi {
status = "disabled";
};
+
+&uart7 {
+ status = "disabled";
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH 3/4] arm64: dts: qcom: qcs6490-rb3gen2-industrial-mezzanine: Add QCC2072 Bluetooth M.2 overlay
2026-05-29 18:02 [PATCH 3/4] arm64: dts: qcom: qcs6490-rb3gen2-industrial-mezzanine: Add QCC2072 Bluetooth M.2 overlay Yepuri Siddu
@ 2026-05-30 1:27 ` sashiko-bot
0 siblings, 0 replies; 2+ messages in thread
From: sashiko-bot @ 2026-05-30 1:27 UTC (permalink / raw)
To: Yepuri Siddu; +Cc: devicetree, conor+dt, robh
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] The `sw_ctrl` pinctrl node is defined but never utilized, and the required GPIO binding is missing from the bluetooth node.
- [High] UART7 is unconditionally disabled in the base industrial mezzanine overlay instead of the M.2-specific overlay, breaking onboard Bluetooth for non-M.2 users.
--
commit 9cd1abaeac0567d92c13345a6a51b9b649ec7b1e
Author: Yepuri Siddu <yepuri.siddu@oss.qualcomm.com>
arm64: dts: qcom: qcs6490-rb3gen2-industrial-mezzanine: Add QCC2072 Bluetooth M.2 overlay
This commit adds a DTSO overlay for the QCS6490 RB3 Gen2 industrial
mezzanine board when the M.2 E-key slot is populated with a QCC2072
Bluetooth module. It configures UART4, sets sleep pin states, maps
host wakeup and power sequencing, and disables UART7 in the base overlay.
> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine-m2-cologne.dtso b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine-m2-cologne.dtso
> new file mode 100644
> index 0000000000000..905a40f4b938f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine-m2-cologne.dtso
[ ... ]
> + sw_ctrl: sw-ctrl-state {
> + pins = "gpio86";
> + function = "gpio";
> + bias-pull-down;
> + };
> +};
[ ... ]
> + bluetooth: bluetooth {
> + compatible = "qcom,qcc2072-bt";
> + max-speed = <3200000>;
> + };
> +};
[Severity: High]
The commit message mentions "SW_CTRL is mapped to gpio86 for power
sequencing." Are we missing a reference to the sw_ctrl pinctrl node here?
It looks like the bluetooth node is missing a GPIO assignment (such as
enable-gpios or swctrl-gpios) and the corresponding pinctrl properties to
utilize the sw_ctrl state. Without these, will the Bluetooth driver be
able to request gpio86 and perform the intended power sequencing?
> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso
> index 83908db335afa..c96c7f52ea7a0 100644
> --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso
> +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso
[ ... ]
> @@ -288,3 +288,7 @@ pcie1_tc9563_resx_n: pcie1-tc9563-resx-state {
> &wifi {
> status = "disabled";
> };
> +
> +&uart7 {
> + status = "disabled";
> +};
[Severity: High]
Does unconditionally disabling uart7 in the base industrial mezzanine
overlay break the onboard Bluetooth for non-M.2 users?
The commit message states this is done "as it is not used when the M.2 slot
is populated". Should this &uart7 override be placed in the M.2-specific
qcs6490-rb3gen2-industrial-mezzanine-m2-cologne.dtso overlay instead, so
it only applies when the M.2 slot is actually populated?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260529180234.3373056-1-yepuri.siddu@oss.qualcomm.com?part=3
^ permalink raw reply [flat|nested] 2+ messages in thread
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2026-05-29 18:02 [PATCH 3/4] arm64: dts: qcom: qcs6490-rb3gen2-industrial-mezzanine: Add QCC2072 Bluetooth M.2 overlay Yepuri Siddu
2026-05-30 1:27 ` sashiko-bot
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