From: sashiko-bot@kernel.org
To: "Guodong Xu" <docular.xu@gmail.com>
Cc: devicetree@vger.kernel.org, conor+dt@kernel.org,
kvm@vger.kernel.org, robh@kernel.org
Subject: Re: [PATCH v3 13/15] riscv: cpufeature: Introduce ISA bases bitmap and rva23u64 detection
Date: Tue, 02 Jun 2026 23:37:50 +0000 [thread overview]
Message-ID: <20260602233750.B03631F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260603-rva23u64-hwprobe-v2-v3-13-5529a7b28384@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Detection of the RVA23U64 profile fails on compliant platforms because it strictly requires the unratified `RISCV_ISA_EXT_B` bundle instead of the formally ratified bitmanip extensions (`Zba`, `Zbb`, `Zbs`).
--
commit 6676802d36b9823a1e8e9c6f39247c2722210748
Author: Guodong Xu <docular.xu@gmail.com>
riscv: cpufeature: Introduce ISA bases bitmap and rva23u64 detection
This commit introduces a per-hart and host-wide bitmap of conformant ISA
profile bases, computed at init time. It also registers the initialization
as a subsys_initcall to ensure prerequisite user pmlen checks are complete
before evaluating RVA23U64 conformity.
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index 79ff431768139..15b708da98a1c 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
[ ... ]
> @@ -1321,3 +1324,90 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin,
> +static void riscv_set_isa_bases(unsigned long *bases, const unsigned long *isa_bitmap)
> +{
[ ... ]
> + /* RVA23U64 */
> +
> + /* Supm with PMLEN=7 */
> + if (!riscv_have_user_pmlen(7))
> + return;
> +
> + __set_bit(RISCV_ISA_EXT_F, ext_mask);
> + __set_bit(RISCV_ISA_EXT_D, ext_mask);
> + __set_bit(RISCV_ISA_EXT_C, ext_mask);
> + __set_bit(RISCV_ISA_EXT_B, ext_mask);
[Severity: Medium]
Will this cause RVA23U64 detection to fail on compliant hardware?
The RVA23U64 profile mandates the Zba, Zbb, and Zbs extensions.
However, the single-letter B extension was never formally ratified, so
compliant device trees typically advertise the individual bitmanip
extensions (zba, zbb, zbs) instead of the umbrella b bundle.
Since riscv_resolve_isa() does not perform reverse mapping to synthesize
the RISCV_ISA_EXT_B bit when its subsets are present, the subsequent
bitmap_subset() check in riscv_set_isa_bases() will fail. This would
prevent the kernel from detecting and exposing the RVA23U64 base profile.
Should this require the individual Zba, Zbb, and Zbs extensions instead
of RISCV_ISA_EXT_B?
> + __set_bit(RISCV_ISA_EXT_ZICSR, ext_mask);
> + __set_bit(RISCV_ISA_EXT_ZICNTR, ext_mask);
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260603-rva23u64-hwprobe-v2-v3-0-5529a7b28384@gmail.com?part=13
next prev parent reply other threads:[~2026-06-02 23:37 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-03 11:11 [PATCH v3 00/15] riscv: hwprobe: Expose RVA23U64 base behavior Guodong Xu
2026-06-03 11:11 ` [PATCH v3 01/15] riscv: hwprobe.rst: Make indentation consistent Guodong Xu
2026-06-03 11:11 ` [PATCH v3 02/15] riscv: hwprobe.rst: Document EXT_ZICFISS and EXT_ZICFILP Guodong Xu
2026-06-03 11:11 ` [PATCH v3 03/15] riscv: Standardize extension capitalization Guodong Xu
2026-06-03 11:11 ` [PATCH v3 04/15] riscv: Add Zicclsm to cpufeature and hwprobe Guodong Xu
2026-06-03 11:12 ` [PATCH v3 05/15] riscv: Add Ziccamoa, Ziccif, Ziccrse, and Za64rs " Guodong Xu
2026-06-03 11:12 ` [PATCH v3 06/15] riscv: Add B to hwcap " Guodong Xu
2026-06-03 11:12 ` [PATCH v3 07/15] dt-bindings: riscv: Add Zic64b extension description Guodong Xu
2026-06-02 23:28 ` sashiko-bot
2026-06-03 11:12 ` [PATCH v3 08/15] riscv: Add Zic64b to cpufeature and hwprobe Guodong Xu
2026-06-02 23:28 ` sashiko-bot
2026-06-03 11:12 ` [PATCH v3 09/15] riscv: dts: spacemit: k3: Add Zic64b ISA extension Guodong Xu
2026-06-03 11:12 ` [PATCH v3 10/15] riscv: dts: spacemit: k1: " Guodong Xu
2026-06-03 11:12 ` [PATCH v3 11/15] riscv: dts: sophgo: sg2044: " Guodong Xu
2026-06-03 11:12 ` [PATCH v3 12/15] riscv: Add a getter for user PMLEN support Guodong Xu
2026-06-03 11:12 ` [PATCH v3 13/15] riscv: cpufeature: Introduce ISA bases bitmap and rva23u64 detection Guodong Xu
2026-06-02 23:37 ` sashiko-bot [this message]
2026-06-03 11:12 ` [PATCH v3 14/15] riscv: cpu: Output isa bases lines in cpuinfo Guodong Xu
2026-06-03 11:12 ` [PATCH v3 15/15] riscv: hwprobe: Introduce rva23u64 base behavior Guodong Xu
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