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From: sashiko-bot@kernel.org
To: "Michal Simek" <michal.simek@amd.com>
Cc: devicetree@vger.kernel.org, conor+dt@kernel.org, robh@kernel.org
Subject: Re: [PATCH v3 5/5] arm64: versal-net: Switch Versal NET to firmware clock interface
Date: Wed, 03 Jun 2026 15:47:04 +0000	[thread overview]
Message-ID: <20260603154704.87D741F00893@smtp.kernel.org> (raw)
In-Reply-To: <c7007b07b00ff00affda9fa67a40667284acb330.1780499520.git.michal.simek@amd.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Duplication and misplacement of DT bindings ABI headers
--

commit bab3d39d7000abda6ce0255f27da2b7b9fbc10cd
Author: Michal Simek <michal.simek@amd.com>

arm64: versal-net: Switch Versal NET to firmware clock interface

Switch Versal NET from using fixed clocks to the firmware-based clock
interface (versal-net-clk.dtsi). Add DT macro headers for Versal NET
and base Versal clocks, power domains and mandatory resets.

> diff --git a/arch/arm64/boot/dts/xilinx/xlnx-versal-clk.h b/arch/arm64/boot/dts/xilinx/xlnx-versal-clk.h
> new file mode 100644
> index 0000000000000..d0c4abf78f307
> --- /dev/null
> +++ b/arch/arm64/boot/dts/xilinx/xlnx-versal-clk.h
> @@ -0,0 +1,123 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2019 - 2022, Xilinx, Inc.
> + * Copyright (C) 2022 - 2026, Advanced Micro Devices, Inc.
> + */
> +
> +#ifndef _XLNX_VERSAL_CLK_H
> +#define _XLNX_VERSAL_CLK_H

[Severity: Low]
Is it intentional to place these DT bindings ABI headers under
arch/arm64/boot/dts/xilinx/ instead of the standard include/dt-bindings/
directory?

Clock, reset, and power domain index definitions are generally considered
ABI and keeping them in include/dt-bindings/ avoids ecosystem fragmentation
and enables easier sharing with bootloaders.

[ ... ]

> diff --git a/arch/arm64/boot/dts/xilinx/xlnx-versal-resets.h b/arch/arm64/boot/dts/xilinx/xlnx-versal-resets.h
> new file mode 100644
> index 0000000000000..fe00f4a0ba65b
> --- /dev/null
> +++ b/arch/arm64/boot/dts/xilinx/xlnx-versal-resets.h
> @@ -0,0 +1,106 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2020 - 2022, Xilinx, Inc.
> + * Copyright (C) 2022 - 2026, Advanced Micro Devices, Inc.
> + */
> +
> +#ifndef _XLNX_VERSAL_RESETS_H
> +#define _XLNX_VERSAL_RESETS_H

[Severity: Low]
Does this file duplicate the existing
include/dt-bindings/reset/xlnx-versal-resets.h?

It appears to be an exact duplicate, but uses a different include guard.
Using the duplicated header here might cause macro redefinition warnings
if both happen to be included.

Could this rely on the existing dt-bindings header instead?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1780499520.git.michal.simek@amd.com?part=5

      reply	other threads:[~2026-06-03 15:47 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-03 15:12 [PATCH v3 0/5] clock: versal-clk: Fix Versal NET clock binding and switch to CCF Michal Simek
2026-06-03 15:12 ` [PATCH v3 1/5] dt-bindings: firmware: xilinx: Add missing example for ZynqMP Michal Simek
2026-06-03 15:30   ` Conor Dooley
2026-06-03 15:12 ` [PATCH v3 2/5] dt-bindings: clock: versal-clk: Fix mio_clk index range in clock-names pattern Michal Simek
2026-06-03 15:24   ` sashiko-bot
2026-06-03 15:33   ` Conor Dooley
2026-06-03 15:35     ` Michal Simek
2026-06-03 16:08       ` Conor Dooley
2026-06-03 15:12 ` [PATCH v3 3/5] dt-bindings: clock: Move xlnx,zynqmp-clk to its own schema Michal Simek
2026-06-03 15:34   ` sashiko-bot
2026-06-03 15:34   ` Conor Dooley
2026-06-03 15:12 ` [PATCH v3 4/5] dt-bindings: clock: versal-clk: Fix Versal NET clock validation Michal Simek
2026-06-03 15:12 ` [PATCH v3 5/5] arm64: versal-net: Switch Versal NET to firmware clock interface Michal Simek
2026-06-03 15:47   ` sashiko-bot [this message]

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