From: sashiko-bot@kernel.org
To: "Dario Binacchi" <dario.binacchi@amarulasolutions.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v4 02/14] arm64: dts: st: add SDMMC2 support on stm32mp25
Date: Fri, 05 Jun 2026 12:31:26 +0000 [thread overview]
Message-ID: <20260605123127.27A181F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260605121957.78409-3-dario.binacchi@amarulasolutions.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [High] The `sdmmc1` node is missing the `power-domains = <&CLUSTER_PD>;` property.
--
commit c335b379d3b92c5ba6ea39f1676b98852d4b2ebe
Author: Dario Binacchi <dario.binacchi@amarulasolutions.com>
arm64: dts: st: add SDMMC2 support on stm32mp25
This commit adds support for the SDMMC2 controller on the stm32mp25
platform. The controller supports SD cards, eMMC memories, and SDIO
devices.
> diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
> --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
> +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
> @@ -1667,6 +1667,22 @@ sdmmc1: mmc@48220000 {
> status = "disabled";
> };
[Severity: High]
This is a pre-existing issue, but I noticed that the sdmmc1 node in the
context block above lacks a power-domains property.
Does the sdmmc1 controller also depend on the CLUSTER_PD power domain,
similar to the newly added sdmmc2 node?
Without the power-domains property, the kernel's power management framework
will not ensure that the domain is powered on when sdmmc1 is active, nor
will it handle suspend/resume power transitions for the controller. If
sdmmc1 is accessed while the bus is unpowered, it might trigger
asynchronous external aborts or bus faults leading to a kernel panic.
If sdmmc1 is used as primary storage, could this make the system unusable
or fail to resume properly?
>
> + sdmmc2: mmc@48230000 {
> + compatible = "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell";
> + arm,primecell-periphid = <0x00353180>;
> + reg = <0x48230000 0x400>, <0x44230800 0x8>;
> + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&rcc CK_KER_SDMMC2>;
> + clock-names = "apb_pclk";
> + resets = <&rcc SDMMC2_R>;
> + cap-sd-highspeed;
> + cap-mmc-highspeed;
> + max-frequency = <120000000>;
> + access-controllers = <&rifsc 77>;
> + power-domains = <&CLUSTER_PD>;
> + status = "disabled";
> + };
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260605121957.78409-1-dario.binacchi@amarulasolutions.com?part=2
next prev parent reply other threads:[~2026-06-05 12:31 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-05 12:18 [PATCH v4 00/14] arm64: support Engicam MicroGEA-STM32MP257-RMM board Dario Binacchi
2026-06-05 12:18 ` [PATCH v4 01/14] dt-bindings: arm: stm32: " Dario Binacchi
2026-06-05 12:18 ` [PATCH v4 02/14] arm64: dts: st: add SDMMC2 support on stm32mp25 Dario Binacchi
2026-06-05 12:31 ` sashiko-bot [this message]
2026-06-05 12:18 ` [PATCH v4 03/14] arm64: dts: st: add CAN1 " Dario Binacchi
2026-06-05 12:18 ` [PATCH v4 04/14] arm64: dts: st: add i2c1 pins for stm32mp25 Dario Binacchi
2026-06-05 12:18 ` [PATCH v4 05/14] arm64: dts: st: add ltdc " Dario Binacchi
2026-06-05 12:27 ` sashiko-bot
2026-06-05 12:18 ` [PATCH v4 06/14] arm64: dts: st: add can1 " Dario Binacchi
2026-06-05 12:18 ` [PATCH v4 07/14] arm64: dts: st: add pwm2/pwm4 " Dario Binacchi
2026-06-05 12:18 ` [PATCH v4 08/14] arm64: dts: st: add sai1 " Dario Binacchi
2026-06-05 12:18 ` [PATCH v4 09/14] arm64: dts: st: add sdmmc2 " Dario Binacchi
2026-06-05 12:18 ` [PATCH v4 10/14] arm64: dts: st: add spi1 " Dario Binacchi
2026-06-05 12:18 ` [PATCH v4 11/14] arm64: dts: st: add usart1 " Dario Binacchi
2026-06-05 12:18 ` [PATCH v4 12/14] arm64: dts: st: support Engicam MicroGEA-STM32MP257 SoM Dario Binacchi
2026-06-05 12:36 ` sashiko-bot
2026-06-05 12:18 ` [PATCH v4 13/14] arm64: dts: st: support Engicam MicroGEA-STM32MP257-RMM board Dario Binacchi
2026-06-05 12:42 ` sashiko-bot
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