Re: [PATCH v3 6/8] pinctrl: qcom: Acknowledge IRQs for PDC interrupt controller

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The patch adds `IRQCHIP_EOI_THREADED` to `msm_gpio_irq_chip.flags`, which alters the EOI timing for all threaded interrupts, but this functional change is completely undocumented in the commit message.
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commit c69ba699fb1e70baa301113c62200fca65540992
Author: Stephan Gerhold <stephan.gerhold@linaro.org>

pinctrl: qcom: Acknowledge IRQs for PDC interrupt controller
    
This commit updates the MSM GPIO driver to properly acknowledge incoming
GPIO interrupts for the PDC interrupt controller. For edge-triggered IRQs,
it uses handle_fasteoi_ack_irq() as the IRQ handler and forwards the
irq_ack() callback to the parent IRQ chip.

> diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
> index 11db6564c44df..17665e1a9dbcb 100644
> --- a/drivers/pinctrl/qcom/pinctrl-msm.c
> +++ b/drivers/pinctrl/qcom/pinctrl-msm.c

[ ... ]

> @@ -1395,6 +1408,7 @@ static const struct irq_chip msm_gpio_irq_chip = {
>  	.flags			= (IRQCHIP_MASK_ON_SUSPEND |
>  				   IRQCHIP_SET_TYPE_MASKED |
>  				   IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND |
> +				   IRQCHIP_EOI_THREADED |
>  				   IRQCHIP_IMMUTABLE),
>  };

[Severity: Medium]
The commit message does not mention the addition of IRQCHIP_EOI_THREADED.

Does this change belong in a separate patch, or should the commit message
be updated to explain why it is needed? 

Adding this flag alters the EOI timing for oneshot threaded interrupts
handled by this chip, deferring the irq_eoi() callback until after the
threaded handler completes.

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Sashiko AI review · https://sashiko.dev/#/patchset/20260616-hamoa_pdc_v3-v3-0-4d8e1504ea75@oss.qualcomm.com?part=6