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From: Dinh Nguyen <dinguyen@kernel.org>
To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org
Cc: dinguyen@kernel.org, devicetree@vger.kernel.org,
	muhammad.nazim.amirul.nazle.asmade@altera.com
Subject: [PATCHv2 1/2] dt-bindings: net: altr,socfpga-stmmac: add more interrupts for Agilex5
Date: Mon, 29 Jun 2026 06:48:17 -0500	[thread overview]
Message-ID: <20260629114818.1746410-1-dinguyen@kernel.org> (raw)

The stmmac hardware on Agilex5 supports 8 TX/RX queue pairs and is
dma-coherent. Update the schema to handle the hardware differences
between SoC variants.

Also make 'interrupts' and 'interrupt-names' as required properties.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2: Set the top level interrupts to include the widest contraints(1-17)
    Just have 1 list of all interrupt-names
    Update commit message to include 'interrupts' and 'interrupt-names'
    as required properties
    Change minItems 1 to maxItems 1 for non agilex5 variants
    Add same constraint for interrupt-names
---
 .../bindings/net/altr,socfpga-stmmac.yaml     | 46 ++++++++++++++++++-
 1 file changed, 45 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml b/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml
index fc445ad5a1f1..63084f762373 100644
--- a/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml
+++ b/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml
@@ -63,11 +63,29 @@ properties:
       - const: ptp_ref
 
   interrupts:
-    maxItems: 1
+    minItems: 1
+    maxItems: 17
 
   interrupt-names:
+    minItems: 1
     items:
       - const: macirq
+      - const: tx-queue-0
+      - const: tx-queue-1
+      - const: tx-queue-2
+      - const: tx-queue-3
+      - const: tx-queue-4
+      - const: tx-queue-5
+      - const: tx-queue-6
+      - const: tx-queue-7
+      - const: rx-queue-0
+      - const: rx-queue-1
+      - const: rx-queue-2
+      - const: rx-queue-3
+      - const: rx-queue-4
+      - const: rx-queue-5
+      - const: rx-queue-6
+      - const: rx-queue-7
 
   iommus:
     minItems: 1
@@ -149,10 +167,36 @@ required:
   - clocks
   - clock-names
   - altr,sysmgr-syscon
+  - interrupts
+  - interrupt-names
 
 allOf:
   - $ref: snps,dwmac.yaml#
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: altr,socfpga-stmmac-agilex5
+    then:
+      properties:
+        interrupts:
+          minItems: 17
+
+        interrupt-names:
+          minItems: 17
+
+        dma-coherent: true
+    else:
+      properties:
+        interrupts:
+          maxItems: 1
+
+        interrupt-names:
+          maxItems: 1
+
+        dma-coherent: false
+
 unevaluatedProperties: false
 
 examples:
-- 
2.42.0.411.g813d9a9188


             reply	other threads:[~2026-06-29 11:48 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-29 11:48 Dinh Nguyen [this message]
2026-06-29 11:48 ` [PATCHv2 2/2] arm64: dts: socfpga: agilex5: update channel interrupts for gmac1 and gmac2 Dinh Nguyen
2026-06-29 12:01   ` sashiko-bot
2026-06-29 12:10 ` [PATCHv2 1/2] dt-bindings: net: altr,socfpga-stmmac: add more interrupts for Agilex5 sashiko-bot
2026-06-29 15:17 ` Conor Dooley

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