Re: [PATCH 3/4] arm64: dts: imx8qm-ss-lsio: add lsio mu6,8,8b

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Redundant re-declaration of the `lsio_mu6` node and label.
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--- Patch [3]: [PATCH 3/4] arm64: dts: imx8qm-ss-lsio: add lsio mu6,8,8b ---
commit e95e394180e13045095ad2b094d537158b113f5c
Author: Frank Li <Frank.Li@nxp.com>

arm64: dts: imx8qm-ss-lsio: add lsio mu6,8,8b

This commit adds mu6, 8, and 8b mailbox nodes to the imx8qm-ss-lsio
device tree.

> diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi
> index b483134f84d18..fb503c93447d1 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi
> @@ -3,6 +3,35 @@
>   * Copyright 2019-2020 NXP
>   *	Dong Aisheng <aisheng.dong@nxp.com>
>   */
> +&lsio_subsys {
> +	lsio_mu6: mailbox@5d210000 {
> +		compatible = "fsl,imx8qm-mu", "fsl,imx6sx-mu";
> +		reg = <0x5d210000 0x10000>;
> +		interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
> +		#mbox-cells = <2>;
> +		power-domains = <&pd IMX_SC_R_MU_6A>;
> +	};

[Severity: Low]
Is this full node definition for lsio_mu6 redundant?

The properties defined here, such as reg, interrupts, #mbox-cells, and
power-domains, appear to already be inherited from the base imx8-ss-lsio.dtsi
file. Furthermore, the QM-specific compatibles are already applied via a
reference at the bottom of this file.

Could this block be safely omitted to avoid duplication? As it currently
stands, it also does not override the status = "disabled" property from the
base file, which might mean the mailbox is still left disabled.

[ ... ]

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Sashiko AI review · https://sashiko.dev/#/patchset/20260706-qm_dts-v1-0-14117a48fbdb@nxp.com?part=3