From: sashiko-bot@kernel.org
To: "Louis-Alexis Eyraud" <louisalexis.eyraud@collabora.com>
Cc: devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v2 03/18] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8195
Date: Fri, 10 Jul 2026 15:09:05 +0000 [thread overview]
Message-ID: <20260710150906.173661F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260709-mt8189-clocks-system-base-v2-3-2926da3db6cf@collabora.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [High] The `mediatek,mt8195-sys-clock.yaml` binding documents `#reset-cells` as a property but fails to enforce it conditionally for hardware variants that act as reset providers (e.g., `mediatek,mt8195-infracfg_ao`), and the example is missing it.
--
--- Patch [3]: [PATCH v2 03/18] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8195 ---
commit 42e0c80a3dd56f332e8ace6fcaa3d35d00fa2f11
Author: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8195
This commit updates the MT8195 clock and sys-clock device tree bindings.
It adds the #clock-cells property to the required list to ensure clock
provider nodes define it properly.
> diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8195-sys-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8195-sys-clock.yaml
> index 69f096eb168d1..ba1b36fa01699 100644
> --- a/Documentation/devicetree/bindings/clock/mediatek,mt8195-sys-clock.yaml
> +++ b/Documentation/devicetree/bindings/clock/mediatek,mt8195-sys-clock.yaml
> @@ -43,6 +43,7 @@ properties:
> required:
> - compatible
> - reg
> + - '#clock-cells'
[Severity: High]
This is a pre-existing issue, but the mediatek,mt8195-sys-clock.yaml binding
documents #reset-cells as a property but fails to enforce it conditionally for
hardware variants that act as reset providers, such as mediatek,mt8195-infracfg_ao.
Should an allOf conditional block be added to enforce #reset-cells for these
compatibles?
Without this constraint, an incomplete device tree node lacking #reset-cells
for infracfg_ao will silently pass dt_binding_check validation. At runtime,
dependent drivers like the thermal driver (which relies on
MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST) could fail to probe or operate
correctly.
Additionally, the example for infracfg_ao later in the file is missing the
#reset-cells property:
- |
infracfg_ao: syscon@10001000 {
compatible = "mediatek,mt8195-infracfg_ao", "syscon";
reg = <0x10001000 0x1000>;
#clock-cells = <1>;
};
If the constraint is properly added, wouldn't the example also need to be
updated with #reset-cells = <1>; to prevent dt_binding_check from failing?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260709-mt8189-clocks-system-base-v2-0-2926da3db6cf@collabora.com?part=3
next prev parent reply other threads:[~2026-07-10 15:09 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-09 13:42 [PATCH v2 00/18] MT8189: Add support for system and base clock controllers Louis-Alexis Eyraud
2026-07-09 13:42 ` [PATCH v2 01/18] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8186 Louis-Alexis Eyraud
2026-07-09 14:01 ` AngeloGioacchino Del Regno
2026-07-09 18:08 ` Conor Dooley
2026-07-09 13:42 ` [PATCH v2 02/18] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8192 Louis-Alexis Eyraud
2026-07-09 14:01 ` AngeloGioacchino Del Regno
2026-07-09 18:08 ` Conor Dooley
2026-07-09 13:42 ` [PATCH v2 03/18] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8195 Louis-Alexis Eyraud
2026-07-09 14:01 ` AngeloGioacchino Del Regno
2026-07-09 18:09 ` Conor Dooley
2026-07-10 15:09 ` sashiko-bot [this message]
2026-07-09 13:42 ` [PATCH v2 04/18] dt-bindings: clock: mediatek: reorder MT8186 compatibles Louis-Alexis Eyraud
2026-07-09 14:03 ` AngeloGioacchino Del Regno
2026-07-09 18:09 ` Conor Dooley
2026-07-09 13:42 ` [PATCH v2 05/18] dt-bindings: clock: mediatek: regroup MT8188 dt-bindings into MT8186 Louis-Alexis Eyraud
2026-07-09 14:03 ` AngeloGioacchino Del Regno
2026-07-09 18:10 ` Conor Dooley
2026-07-10 15:09 ` sashiko-bot
2026-07-09 13:42 ` [PATCH v2 06/18] dt-bindings: clock: mediatek: regroup MT8192 " Louis-Alexis Eyraud
2026-07-09 14:03 ` AngeloGioacchino Del Regno
2026-07-09 18:10 ` Conor Dooley
2026-07-10 15:09 ` sashiko-bot
2026-07-09 13:42 ` [PATCH v2 07/18] dt-bindings: clock: mediatek: regroup MT8195 " Louis-Alexis Eyraud
2026-07-09 14:03 ` AngeloGioacchino Del Regno
2026-07-09 18:10 ` Conor Dooley
2026-07-09 13:42 ` [PATCH v2 08/18] dt-bindings: clock: mediatek: Add MT8189 clocks Louis-Alexis Eyraud
2026-07-09 14:05 ` AngeloGioacchino Del Regno
2026-07-09 18:12 ` Conor Dooley
2026-07-09 13:42 ` [PATCH v2 09/18] clk: mediatek: Add MT8189 apmixedsys clock support Louis-Alexis Eyraud
2026-07-10 15:09 ` sashiko-bot
2026-07-09 13:42 ` [PATCH v2 10/18] clk: mediatek: Add MT8189 topckgen " Louis-Alexis Eyraud
2026-07-10 15:09 ` sashiko-bot
2026-07-09 13:42 ` [PATCH v2 11/18] clk: mediatek: Add MT8189 vlpckgen " Louis-Alexis Eyraud
2026-07-09 13:42 ` [PATCH v2 12/18] clk: mediatek: Add MT8189 vlpcfg " Louis-Alexis Eyraud
2026-07-09 13:42 ` [PATCH v2 13/18] clk: mediatek: Add MT8189 bus " Louis-Alexis Eyraud
2026-07-09 13:42 ` [PATCH v2 14/18] clk: mediatek: Add MT8189 dbgao " Louis-Alexis Eyraud
2026-07-09 13:42 ` [PATCH v2 15/18] clk: mediatek: Add MT8189 dvfsrc " Louis-Alexis Eyraud
2026-07-10 15:09 ` sashiko-bot
2026-07-09 13:42 ` [PATCH v2 16/18] clk: mediatek: Add MT8189 i2c " Louis-Alexis Eyraud
2026-07-09 13:42 ` [PATCH v2 17/18] clk: mediatek: Add MT8189 scp " Louis-Alexis Eyraud
2026-07-10 15:09 ` sashiko-bot
2026-07-09 13:42 ` [PATCH v2 18/18] clk: mediatek: Add MT8189 ufs " Louis-Alexis Eyraud
2026-07-10 15:09 ` sashiko-bot
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260710150906.173661F000E9@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=louisalexis.eyraud@collabora.com \
--cc=robh@kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox